A Segmented Precision Configurable Computing-in-Memory Macro With Dual-Edge Time-Domain Structure

Abstract

In computing-in-memory (CIM) architecture, it is necessary to reliably adjust the precision according to the specific demands of the application, enabling a tradeoff between high precision and high energy efficiency. In addition, when performing multibit computations, nonlinearity errors between different bits can adversely affect the network’s accuracy. Therefore, this work proposes an 8Kb dual-edge time-domain CIM macro, which incorporates a segmented precision configuration scheme. By mapping the high and low 4 bits of the 8-bit input to the rising and falling edges of the pulse for independent computation, this design mitigates nonlinearity errors between high and low bits. The precision of multiplication-and-accumulation (MAC) operations for both high and low bits can be independently adjusted, ensuring sufficient accuracy while enhancing energy efficiency. This work attains an energy efficiency ranging from 8.03 to 13.20 TOPS/W in the end. For the CIFAR-10 dataset, when the inputs and weights are of 8-bit precision, this work reaches an inference accuracy of 90.27%–91.92%.