Electron beam lithography and dimensional metrology for fin and nanowire devices on Ge, SiGe and GeOI substrates

IF 2.6 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Microelectronic Engineering Pub Date : 2023-08-15 DOI:10.1016/j.mee.2023.112071
Nikolay Petkov , Margarita Georgieva , Sinan Bugu , Ray Duffy , Brendan McCarthy , Maksym Myronov , Ann-Marie Kelleher , Graeme Maxwell , Giorgos Fagas
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Abstract

Until now there is no systematic study on the effect of the substrate type on the hydrogen silsesquioxane (HSQ) electron beam lithography (EBL) patterning process. We investigate arrays of line structures with varying width and spacing, starting at 10 nm, exposed at varying dose, and developed by salty NaOH and TMAH developers on group IV semiconductor substrates. We demonstrate that the HSQ EBL process on Ge is much more limited in achieving the smallest obtainable features, having optimal uniformity and fidelity, in comparison to Si. Monte-Carlo simulations of the e-beam/substrate interactions for “pure” Si and Ge substrates, and varying content Ge/Si epitaxial layers on Si, suggest that the limitations seen are directly linked to back-scattered electron (BSE) generation. As predicted by the simulations and shown experimentally, improved fidelity and resolution of the features can be achieved by minimizing the (BSE) generation coming from the Ge contribution in the substartes. Finally, from a metrology perspective, it is demonstrated that although line patterns may appear resolved in SEM images, the variation in the brightness across neighbouring lines is a key parameter in understanding the resist clearance between lines, that will affect the next etching step for pattern transfer onto the underlying substrate. These results are important for patterning high-density line structures and nano-device engineering as required for realising state-of-the art laterally stacked group IV multi-channel field effect transistors (FETs).

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Ge, SiGe和GeOI基板上鳍片和纳米线器件的电子束光刻和尺寸测量
迄今为止,关于衬底类型对硅氧烷氢电子束光刻(EBL)过程的影响还没有系统的研究。我们研究了具有不同宽度和间距的线结构阵列,从10 nm开始,以不同剂量暴露,并由盐NaOH和TMAH开发人员在IV族半导体衬底上开发。我们证明,与Si相比,Ge上的HSQ EBL工艺在实现最小可获得特征方面受到更多限制,具有最佳的均匀性和保真度。“纯”Si和Ge衬底的电子束/衬底相互作用的蒙特卡罗模拟,以及Si上不同含量的Ge/Si外延层,表明所见的限制与背散射电子(BSE)的产生直接相关。正如模拟和实验所预测的那样,通过最小化基底中Ge贡献的(BSE)产生,可以提高特征的保真度和分辨率。最后,从计量学的角度来看,虽然线条图案可能在SEM图像中出现分辨,但相邻线条之间的亮度变化是理解线条之间抗蚀剂间隙的关键参数,这将影响图案转移到底层衬底的下一个蚀刻步骤。这些结果对于绘制高密度线结构和纳米器件工程具有重要意义,因为这是实现最先进的横向堆叠IV组多通道场效应晶体管(fet)所必需的。
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来源期刊
Microelectronic Engineering
Microelectronic Engineering 工程技术-工程:电子与电气
CiteScore
5.30
自引率
4.30%
发文量
131
审稿时长
29 days
期刊介绍: Microelectronic Engineering is the premier nanoprocessing, and nanotechnology journal focusing on fabrication of electronic, photonic, bioelectronic, electromechanic and fluidic devices and systems, and their applications in the broad areas of electronics, photonics, energy, life sciences, and environment. It covers also the expanding interdisciplinary field of "more than Moore" and "beyond Moore" integrated nanoelectronics / photonics and micro-/nano-/bio-systems. Through its unique mixture of peer-reviewed articles, reviews, accelerated publications, short and Technical notes, and the latest research news on key developments, Microelectronic Engineering provides comprehensive coverage of this exciting, interdisciplinary and dynamic new field for researchers in academia and professionals in industry.
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