FPGA Implementation of Neural Nets

Sujatha Kumari, Sudarshan Patil Kulkarni, C. G. Sinchana
{"title":"FPGA Implementation of Neural Nets","authors":"Sujatha Kumari, Sudarshan Patil Kulkarni, C. G. Sinchana","doi":"10.24425/ijet.2023.146513","DOIUrl":null,"url":null,"abstract":"— The field programmable gate array (FPGA) is used to build an artificial neural network in hardware. Architecture for a digital system is devised to execute a feed-forward multilayer neural network. ANN and CNN are very commonly used architectures. Verilog is utilized to describe the designed architecture. For the computation of certain tasks, a neural network’s distribut ed architecture structure makes it potentially efficient. The same features make neural nets suitable for application in VLSI technology. For the hardware of a neural network, a single neuron must be effectively implemented (NN). Reprogrammable computer systems based on FPGAs are useful for hardware implementations of neural networks.","PeriodicalId":13922,"journal":{"name":"International Journal of Electronics and Telecommunications","volume":" ","pages":""},"PeriodicalIF":0.5000,"publicationDate":"2023-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal of Electronics and Telecommunications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.24425/ijet.2023.146513","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"TELECOMMUNICATIONS","Score":null,"Total":0}
引用次数: 0

Abstract

— The field programmable gate array (FPGA) is used to build an artificial neural network in hardware. Architecture for a digital system is devised to execute a feed-forward multilayer neural network. ANN and CNN are very commonly used architectures. Verilog is utilized to describe the designed architecture. For the computation of certain tasks, a neural network’s distribut ed architecture structure makes it potentially efficient. The same features make neural nets suitable for application in VLSI technology. For the hardware of a neural network, a single neuron must be effectively implemented (NN). Reprogrammable computer systems based on FPGAs are useful for hardware implementations of neural networks.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
神经网络的FPGA实现
—硬件采用现场可编程门阵列(FPGA)构建人工神经网络。设计了一个数字系统的结构来执行前馈多层神经网络。ANN和CNN是非常常用的架构。Verilog被用来描述设计的架构。对于某些任务的计算,神经网络的分布式架构结构使其具有潜在的效率。同样的特点使得神经网络适合应用于超大规模集成电路技术。对于神经网络的硬件来说,单个神经元必须被有效地实现。基于fpga的可编程计算机系统对于神经网络的硬件实现非常有用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
CiteScore
1.50
自引率
14.30%
发文量
0
审稿时长
12 weeks
期刊最新文献
Optimization of Animal Detection in Thermal Images Using YOLO Architecture Efficient FPGA Implementation of Recursive Least Square Adaptive Filter Using Non- Restoring Division Algorithm Comparison of Wireless Data Transmission Protocols for Residential Water Meter Applications 147684 147700
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1