Sujatha Kumari, Sudarshan Patil Kulkarni, C. G. Sinchana
{"title":"FPGA Implementation of Neural Nets","authors":"Sujatha Kumari, Sudarshan Patil Kulkarni, C. G. Sinchana","doi":"10.24425/ijet.2023.146513","DOIUrl":null,"url":null,"abstract":"— The field programmable gate array (FPGA) is used to build an artificial neural network in hardware. Architecture for a digital system is devised to execute a feed-forward multilayer neural network. ANN and CNN are very commonly used architectures. Verilog is utilized to describe the designed architecture. For the computation of certain tasks, a neural network’s distribut ed architecture structure makes it potentially efficient. The same features make neural nets suitable for application in VLSI technology. For the hardware of a neural network, a single neuron must be effectively implemented (NN). Reprogrammable computer systems based on FPGAs are useful for hardware implementations of neural networks.","PeriodicalId":13922,"journal":{"name":"International Journal of Electronics and Telecommunications","volume":" ","pages":""},"PeriodicalIF":0.5000,"publicationDate":"2023-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal of Electronics and Telecommunications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.24425/ijet.2023.146513","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"TELECOMMUNICATIONS","Score":null,"Total":0}
引用次数: 0
Abstract
— The field programmable gate array (FPGA) is used to build an artificial neural network in hardware. Architecture for a digital system is devised to execute a feed-forward multilayer neural network. ANN and CNN are very commonly used architectures. Verilog is utilized to describe the designed architecture. For the computation of certain tasks, a neural network’s distribut ed architecture structure makes it potentially efficient. The same features make neural nets suitable for application in VLSI technology. For the hardware of a neural network, a single neuron must be effectively implemented (NN). Reprogrammable computer systems based on FPGAs are useful for hardware implementations of neural networks.