R. Gudlavalleti, Jacques Goosen, Tao Liu, Hunter Bradley, Elisa Parent, Abdulmajeed Almalki, Erik Perez, F. Jain
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引用次数: 0
Abstract
This paper presents fabrication of multi-state inverters incorporating SiOx-cladded Si quantum dot in the channel and gate region of driver, load, and access transistors. Experimental characteristics are presented exhibiting 3-state behavior in Quantum-dot Channel (QDC)-Quantum-dot Gate (QDG) FETs having Si quantum dots. It is shown that QDC-QDG-FETs-based enhancement mode inverter configurations are the building blocks of a multi-bit static random access memory (SRAM). QDC-QDG-FETs exhibiting four states can also be used to implement compact 4-state logic and nonvolatile memories or random access nonvolatile memories.
期刊介绍：
Launched in 1990, the International Journal of High Speed Electronics and Systems (IJHSES) has served graduate students and those in R&D, managerial and marketing positions by giving state-of-the-art data, and the latest research trends. Its main charter is to promote engineering education by advancing interdisciplinary science between electronics and systems and to explore high speed technology in photonics and electronics. IJHSES, a quarterly journal, continues to feature a broad coverage of topics relating to high speed or high performance devices, circuits and systems.
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