Aibin Yan, Yuting He, Xiaoxiao Niu, Jie Cui, Tianming Ni, Zhengfeng Huang, P. Girard, X. Wen
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引用次数: 0
Abstract
This article proposes a robust and low power flip-flop cell with complete double-node-upset (DNU) tolerance for aerospace applications. The proposed cell is constructed from a master latch and a slave latch. The master latch comprises two C-elements as well as one clock-controlled C-element; the slave latch is similar to the master but has an extra keeper to avoid high-impedance state of the output-level C-element. The proposed cell can provide complete DNU-tolerance while reducing power dissipation by 65x0025; on average when compared with existing radiation-hardened flip-flop cells.
期刊介绍：
IEEE Design & Test offers original works describing the models, methods, and tools used to design and test microelectronic systems from devices and circuits to complete systems-on-chip and embedded software. The magazine focuses on current and near-future practice, and includes tutorials, how-to articles, and real-world case studies. The magazine seeks to bring to its readers not only important technology advances but also technology leaders, their perspectives through its columns, interviews, and roundtable discussions. Topics include semiconductor IC design, semiconductor intellectual property blocks, design, verification and test technology, design for manufacturing and yield, embedded software and systems, low-power and energy-efficient design, electronic design automation tools, practical technology, and standards.
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