Packaging design and thermal analysis for 1 mm2 high power VCSEL

IF 0.7 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC Microelectronics International Pub Date : 2022-07-15 DOI:10.1108/mi-03-2022-0048
Khairul Mohd Arshad, Muhamad Mat Noor, A. A. Manaf, Kawarada H., F. S., Syamsul M.
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Abstract

Purpose Vertical-cavity surface-emitting laser (VCSEL) is a high-performance semiconductor device made of unique epitaxial layers grown on n-type GaAs or InP substrates. The VCSEL’s thermal resistance, Rth, is an essential metric that reflects its thermal properties and dependability. The purpose of this paper is to develop packaging for 1 mm2 VCSEL chips made of a variety of materials, such as ceramic, lead frame and printed circuit board (PCB)-based packaging, as well as provide an idea or design that can withstand and perform well in terms of Rth and heat dissipation during operation. SolidWorks 2017 and AutoCAD Mechanical 2017 software were used to publish all thoughts and ideas, including the size dimensions (x, y and z) and material choices for each package. Design/methodology/approach Following the modelling and material selection, the next step is to use the Ansys Mechanical Structural FEA Analysis software to simulate all packaging for Rth and determine which packaging produced the best result, therefore, determining the heat dissipation for each packing. All parameters were used based on the standard cleanroom requirement for the industrial manufacturing backend process, where the cleanroom classification is 10,000 particles (ISO 7). The results demonstrated that the ceramic and lead frame provided good Rth values of 7.3 and 7.0 K/W, respectively, when compared to the PCB, which provided more than 80 K/W; thus, the heat dissipation for PCB packaging also increased. Findings As a result of the research, it was determined that ceramic and lead frame packaging are appropriate and capable of delivering good Rth and heat dissipation values when compared to PCB. In comparison to PCB, which requires numerous modifications, such as adding via holes and a thermal bar in an attempt to lower the Rth value, neither packaging requires improvement. Ceramic was chosen for development based on Rth's highest performance, with the actual device consisting of a lead frame and PCB. The Zth measurement test was carried out on a ceramic package, and the Rth result was comparable to the simulation result of 7.6 K/W, indicating that simulation was already proved for research and development. Originality/value The purpose of this study is to determine which proposed packaging design would give the highest Rth performance of a 1 mm2 chip as well as the best heat dissipation. In comparison to other studies, VCSEL packaging used the header and window cap as package components with a wavelength of 850 nm, and other VCSEL packaging developments used the sub mount on ceramic package with an output power ranging from 500 mW to 2 W, whereas this study used a huge wavelength and an output power of 4 W.
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1mm2大功率VCSEL的封装设计和热分析
摘要多腔表面发射激光器(VCSEL)是一种在n型GaAs或InP衬底上生长的独特外延层构成的高性能半导体器件。VCSEL的热阻Rth是反映其热性能和可靠性的重要指标。本文的目的是为由陶瓷、引线框架和印刷电路板(PCB)等多种材料制成的1mm2 VCSEL芯片开发封装,并提供一种在运行过程中能够承受和表现良好的辐射和散热的想法或设计。使用SolidWorks 2017和AutoCAD Mechanical 2017软件发布所有想法和想法,包括每个包装的尺寸尺寸(x, y和z)和材料选择。设计/方法/方法在建模和材料选择之后,下一步是使用Ansys机械结构有限元分析软件模拟Rth的所有包装,并确定哪种包装产生最佳效果,从而确定每种包装的散热。所有参数都是根据工业制造后端工艺的标准洁净室要求使用的,其中洁净室分类为10,000个颗粒(ISO 7)。结果表明,与提供超过80 K/W的PCB相比,陶瓷和引线框架的Rth值分别为7.3和7.0 K/W;因此,PCB封装的散热也增加了。研究结果表明,与PCB相比,陶瓷和引线框架封装是合适的,并且能够提供良好的辐射和散热值。与PCB相比,PCB需要进行许多修改,例如增加通孔和热棒以试图降低Rth值,两种封装都不需要改进。基于Rth的最高性能,陶瓷被选择用于开发,实际设备由引线框架和PCB组成。在陶瓷封装上进行了第z次测量试验,第th次测量结果与7.6 K/W的仿真结果相当,表明仿真已经为研发提供了依据。原创性/价值本研究的目的是确定哪种拟议的封装设计将提供1mm2芯片的最高Rth性能以及最佳散热。与其他研究相比,VCSEL封装使用头部和窗盖作为封装组件,波长为850 nm,其他VCSEL封装开发使用陶瓷封装上的子安装,输出功率从500 mW到2 W,而本研究使用的是巨大的波长和4 W的输出功率。
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来源期刊
Microelectronics International
Microelectronics International 工程技术-材料科学:综合
CiteScore
1.90
自引率
9.10%
发文量
28
审稿时长
>12 weeks
期刊介绍: Microelectronics International provides an authoritative, international and independent forum for the critical evaluation and dissemination of research and development, applications, processes and current practices relating to advanced packaging, micro-circuit engineering, interconnection, semiconductor technology and systems engineering. It represents a current, comprehensive and practical information tool. The Editor, Dr John Atkinson, welcomes contributions to the journal including technical papers, research papers, case studies and review papers for publication. Please view the Author Guidelines for further details. Microelectronics International comprises a multi-disciplinary study of the key technologies and related issues associated with the design, manufacture, assembly and various applications of miniaturized electronic devices and advanced packages. Among the broad range of topics covered are: • Advanced packaging • Ceramics • Chip attachment • Chip on board (COB) • Chip scale packaging • Flexible substrates • MEMS • Micro-circuit technology • Microelectronic materials • Multichip modules (MCMs) • Organic/polymer electronics • Printed electronics • Semiconductor technology • Solid state sensors • Thermal management • Thick/thin film technology • Wafer scale processing.
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