Improvement of a Nano-scale Silicon on Insulator Field Effect Transistor Performance using Electrode, Doping and Buried Oxide Engineering

IF 1.4 Q4 NANOSCIENCE & NANOTECHNOLOGY Journal of Nanostructures Pub Date : 2020-04-01 DOI:10.22052/JNS.2020.02.011
Mohammad Karbalaei, D. Dideban, N. Moezi, H. Heidari
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引用次数: 4

Abstract

In this work, a novel Silicon on Insulator (SOI) MOSFET is proposed and investigated. The drain and source electrode structures are optimized to enhance ON-current while global device temperature and hot carrier injection are decreased. In addition, to create an effective heat passage from channel to outside of the device, a silicon region has embedded in the buried oxide. In order to reduce the device leakage current and controlling the threshold voltage, a p-type retrograde doping is introduced into channel region. Since the air has the least permittivity among materials, it can be utilized to decrease the device parasitic capacitances. Based on this, an air gap is embedded in the buried oxide near the silicon to improve RF performance of the device. Because the source and drain electrodes are embedded in and over the silicon film in the source and drain regions, we called this structure EEIOS-SOI MOSFET. “EEIOS” stands for “Embedded Electrodes In and Over the Silicon film”. During this work, EEIOS-SOI MOSFET is compared with a conventional SOI MOSFET and another SOI MOSFET with just Embedded Electrodes In the Silicon Film (EEIS-SOI). EEIS-SOI presents better electrical figure of merits including lower subthreshold slope and lower leakage current in simulations. An immense investigation among these devices shows that EEIOS-SOI MOSFET has better transconductance, lower gate injection leakage current and lower temperature related to DC parameters and higher cut off frequency, gain bandwidth product and unilateral power gain related to AC figures of merits compared to its counterparts.
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利用电极、掺杂和埋地氧化物技术改善纳米硅绝缘体场效应晶体管性能
本文提出并研究了一种新型的绝缘体上硅MOSFET。漏极和源极电极结构被优化以增强导通电流,同时降低全局器件温度和热载流子注入。此外,为了形成从沟道到器件外部的有效热通道,硅区域嵌入了掩埋的氧化物中。为了减少器件漏电流并控制阈值电压,在沟道区引入了p型反向掺杂。由于空气具有材料中最小的介电常数,因此可以利用它来降低器件寄生电容。基于此,在硅附近的掩埋氧化物中嵌入气隙,以提高器件的RF性能。由于源极和漏极嵌入源极和漏电区的硅膜中并在硅膜上,我们将这种结构称为EEIOS-SOI MOSFET。“EEIOS”代表“硅膜内外嵌入电极”。在这项工作中,将EEIOS-SOI MOSFET与传统的SOI MOSFET和另一种仅在硅膜中嵌入电极的SOI FET(EEIS-SOI)进行了比较。EEIS-SOI在模拟中表现出更好的电学性能,包括较低的亚阈值斜率和较低的漏电流。对这些器件的大量研究表明,与同类器件相比,EEIOS-SOI MOSFET具有更好的跨导、更低的栅极注入漏电流和更低的与直流参数相关的温度,以及更高的截止频率、增益带宽乘积和与交流相关的单边功率增益。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Journal of Nanostructures
Journal of Nanostructures NANOSCIENCE & NANOTECHNOLOGY-
CiteScore
2.60
自引率
0.00%
发文量
0
审稿时长
7 weeks
期刊介绍: Journal of Nanostructures is a medium for global academics to exchange and disseminate their knowledge as well as the latest discoveries and advances in the science and engineering of nanostructured materials. Topics covered in the journal include, but are not limited to the following: Nanosystems for solar cell, energy, catalytic and environmental applications Quantum dots, nanocrystalline materials, nanoparticles, nanocomposites Characterization of nanostructures and size dependent properties Fullerenes, carbon nanotubes and graphene Self-assembly and molecular organization Super hydrophobic surface and material Synthesis of nanostructured materials Nanobiotechnology and nanomedicine Functionalization of nanostructures Nanomagnetics Nanosensors.
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