A Novel Investigation Method for the S21 Detection Circuit

Abstract

This research proposes a novel method to investigate the performance of the S21 detection circuit. Aiming at low frequencies or DC, the method serves as an efficient way of verification and enjoys the benefit of low testing costs. The novel investigation method is demonstrated at 50 MHz and verified by the scattering parameters at 11.05 GHz. Based on the investigation, a model of process variations is constructed. The length of the interface paths is estimated by the model to be 63μm, which is consistent with the corresponding length of 74.6μm in the layout. For the measured phase and magnitude, the model indicates that the process variations in the device under test cause errors of 18.91% and 1.27%, whereas those in the interface paths lead to errors of 1.83% and 1%. Based on the model, practical recommendations are also proposed to further improve the measurement precision in the future.