Alireza Abdellahi Khorasgani, Mahdi Sajadieh, Mohammad Rouhollah Yazdani
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引用次数: 0
Abstract
Nowadays, the Internet of things (IoT) has extensively found its way into everyday life, raising the alarm regarding data security and user privacy. However, IoT devices have numerous limitations that inhibit the implementation of optimal cost-effective security solutions. In recent years, researchers have proposed a small number of RFID-based (radio-frequency identification) security solutions for the IoT. The use of RFID to secure IoT systems is growing rapidly, for it provides small-scale efficient security mechanisms. Due to the importance of privacy and security in IoT systems, Chuang and Tu have proposed a lightweight authentication protocol using XCor operation. The purpose is to investigate the security of the mentioned protocol and to show the problems of XCor operations used in this protocol. The authors reveal its vulnerability to various attacks, such as tag impersonation, reader impersonation and de−synchronisation attacks. To solve the problems of the Chuang protocol, a secure authentication protocol that uses the lightweight Plr operation is proposed. A formal security analysis of this protocol is performed based on the BAN (Burrows-Abadi-Needham) logic. Furthermore, a comparison was drawn between the proposed protocol and the existing similar protocols in terms of performance evaluation. The comparison will reveal that the proposed protocol is both lightweight and highly secure.
期刊介绍:
IET Computers & Digital Techniques publishes technical papers describing recent research and development work in all aspects of digital system-on-chip design and test of electronic and embedded systems, including the development of design automation tools (methodologies, algorithms and architectures). Papers based on the problems associated with the scaling down of CMOS technology are particularly welcome. It is aimed at researchers, engineers and educators in the fields of computer and digital systems design and test.
The key subject areas of interest are:
Design Methods and Tools: CAD/EDA tools, hardware description languages, high-level and architectural synthesis, hardware/software co-design, platform-based design, 3D stacking and circuit design, system on-chip architectures and IP cores, embedded systems, logic synthesis, low-power design and power optimisation.
Simulation, Test and Validation: electrical and timing simulation, simulation based verification, hardware/software co-simulation and validation, mixed-domain technology modelling and simulation, post-silicon validation, power analysis and estimation, interconnect modelling and signal integrity analysis, hardware trust and security, design-for-testability, embedded core testing, system-on-chip testing, on-line testing, automatic test generation and delay testing, low-power testing, reliability, fault modelling and fault tolerance.
Processor and System Architectures: many-core systems, general-purpose and application specific processors, computational arithmetic for DSP applications, arithmetic and logic units, cache memories, memory management, co-processors and accelerators, systems and networks on chip, embedded cores, platforms, multiprocessors, distributed systems, communication protocols and low-power issues.
Configurable Computing: embedded cores, FPGAs, rapid prototyping, adaptive computing, evolvable and statically and dynamically reconfigurable and reprogrammable systems, reconfigurable hardware.
Design for variability, power and aging: design methods for variability, power and aging aware design, memories, FPGAs, IP components, 3D stacking, energy harvesting.
Case Studies: emerging applications, applications in industrial designs, and design frameworks.