A new secure communication scheme using fractional order delayed chaotic system: design and electronics circuit simulation

IF 1.4 4区 工程技术 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE Analog Integrated Circuits and Signal Processing Pub Date : 2019-01-05 DOI:10.1007/s10470-018-01382-x
Fadia Zouad, Karim Kemih, Hamid Hamiche
{"title":"A new secure communication scheme using fractional order delayed chaotic system: design and electronics circuit simulation","authors":"Fadia Zouad,&nbsp;Karim Kemih,&nbsp;Hamid Hamiche","doi":"10.1007/s10470-018-01382-x","DOIUrl":null,"url":null,"abstract":"<div><p>In this paper, a new approach to secure in perturbed receiver based on the Chen fractional order delayed chaotic system is developed and the electronics circuit is simulated with Multisim. The main idea of this approach is the injection of the transmitted message in the dynamics of the Chen fractional order delayed chaotic system in the transmitter. To recover the message from the perturbed receiver, we use the H-infinity to establish the synchronization between the transmitter and the receiver and to recover the transmitted signal. Little paper in the literature presents the electronic circuit of the secure communication using fractional order delayed chaotic system due to the difficulty of realization, for it, the electronic circuit is detailed using Multisim software to demonstrate the feasibility of the proposed approach.</p></div>","PeriodicalId":7827,"journal":{"name":"Analog Integrated Circuits and Signal Processing","volume":"99 3","pages":"619 - 632"},"PeriodicalIF":1.4000,"publicationDate":"2019-01-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1007/s10470-018-01382-x","citationCount":"23","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analog Integrated Circuits and Signal Processing","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10470-018-01382-x","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 23

Abstract

In this paper, a new approach to secure in perturbed receiver based on the Chen fractional order delayed chaotic system is developed and the electronics circuit is simulated with Multisim. The main idea of this approach is the injection of the transmitted message in the dynamics of the Chen fractional order delayed chaotic system in the transmitter. To recover the message from the perturbed receiver, we use the H-infinity to establish the synchronization between the transmitter and the receiver and to recover the transmitted signal. Little paper in the literature presents the electronic circuit of the secure communication using fractional order delayed chaotic system due to the difficulty of realization, for it, the electronic circuit is detailed using Multisim software to demonstrate the feasibility of the proposed approach.

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一种新的基于分数阶延迟混沌系统的安全通信方案:设计与电路仿真
本文在Chen分数阶延迟混沌系统的基础上,提出了一种新的扰动接收机安全方法,并用Multisim对其电路进行了仿真。该方法的主要思想是将传输信息注入Chen分数阶延迟混沌系统的动力学中。为了从受干扰的接收机中恢复消息,我们使用H-无穷大来建立发射机和接收机之间的同步,并恢复发送的信号。由于实现困难,文献中很少有论文提出使用分数阶延迟混沌系统进行安全通信的电子电路,为此,使用Multisim软件对电子电路进行了详细说明,以证明所提出方法的可行性。
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来源期刊
Analog Integrated Circuits and Signal Processing
Analog Integrated Circuits and Signal Processing 工程技术-工程:电子与电气
CiteScore
0.30
自引率
7.10%
发文量
141
审稿时长
7.3 months
期刊介绍: Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today. A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.
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