A Fully-Digital Variation-Tolerant Runtime Detector for PCB-Level Probing Attack in a 28-nm CMOS

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Solid-State Circuits Letters Pub Date : 2023-08-30 DOI:10.1109/LSSC.2023.3310266
Mao Li;Yunze Yang;Weifeng He;Sanu K. Mathew;Vivek De;Mingoo Seok
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Abstract

This letter presents the first on-chip detector for monitoring a PCB-level probing attack in 28-nm CMOS based on a time-to-digital converter (TDC). It can detect a probing attempt caused by placing a probe with a loading capacitance as small as 2 pF, encompassing most commercial passive probes. It also does so robustly across 30°C–90°C and 0.8–0.9 V, up to the data rate of 160 Mb/s during runtime. The proposed detector is integrated with a general-purpose digital output cell. It consumes $3910 ~\mu \text{m} ^{\mathrm{ 2}}$ and $36.8 ~\mu \text{W}$ at 40 Mb/s.
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用于28nm CMOS中PCB级探测攻击的全数字容错运行时检测器
这封信介绍了第一个基于时间-数字转换器(TDC)的芯片上检测器,用于监测28 nm CMOS中的PCB级探测攻击。它可以检测由放置负载电容小至2pF的探针引起的探测尝试,包括大多数商业无源探针。它在30°C–90°C和0.8–0.9 V范围内也表现强劲,运行时数据速率高达160 Mb/s。所提出的检测器与通用数字输出单元集成在一起。它在40 Mb/s时消耗3910~\mu\text{m}^{\mathrm{2}}$和36.8~\mu\ttext{W}$。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Solid-State Circuits Letters
IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering
CiteScore
4.30
自引率
3.70%
发文量
52
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