{"title":"A Structural Based Thermal Model Description for Vertical SiC Power MOSFETs under Fault Conditions","authors":"A. Maerz, Teresa Bertelshofer, M. Bakran","doi":"10.1155/2016/9414901","DOIUrl":null,"url":null,"abstract":"The accurate prediction of the SiC MOSFET withstanding time for single fault events greatly influences the requirements for device protection circuits for these devices in power converter applications, like voltage source inverters or power electronic transformers. For this reason, a thermal model, based on the structural design and the physical dimensions of the chip as well as material properties of 4H-SiC, is proposed. This article gives a general description of the thermal behaviour of vertical SiC MOSFET under various driving and boundary conditions in case of a short-circuit event. The thermal model substitutes destructive tests of a device for an individual set of boundary conditions of an occurring fault event. The validity of the analytically parametrised thermal model is verified by experimental short-circuit tests of state-of-the-art vertical SiC MOSFETs for a set of various boundary conditions. The investigated thermal model can furthermore be used to standardise different gate-oxide degradation values from the literature for means of lifetime prediction of the gate oxide for an individual application under repetitive occurring fault or overload conditions. These manufacturer specific reported values measured with no standardised testing procedures can be translated into a maximum junction temperature, which is repeatedly reached. The thermal model therefore provides a unifying parameter for the gate-oxide lifetime calculation for an individual chip and application.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":1.3000,"publicationDate":"2016-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2016/9414901","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Active and Passive Electronic Components","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1155/2016/9414901","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 4
Abstract
The accurate prediction of the SiC MOSFET withstanding time for single fault events greatly influences the requirements for device protection circuits for these devices in power converter applications, like voltage source inverters or power electronic transformers. For this reason, a thermal model, based on the structural design and the physical dimensions of the chip as well as material properties of 4H-SiC, is proposed. This article gives a general description of the thermal behaviour of vertical SiC MOSFET under various driving and boundary conditions in case of a short-circuit event. The thermal model substitutes destructive tests of a device for an individual set of boundary conditions of an occurring fault event. The validity of the analytically parametrised thermal model is verified by experimental short-circuit tests of state-of-the-art vertical SiC MOSFETs for a set of various boundary conditions. The investigated thermal model can furthermore be used to standardise different gate-oxide degradation values from the literature for means of lifetime prediction of the gate oxide for an individual application under repetitive occurring fault or overload conditions. These manufacturer specific reported values measured with no standardised testing procedures can be translated into a maximum junction temperature, which is repeatedly reached. The thermal model therefore provides a unifying parameter for the gate-oxide lifetime calculation for an individual chip and application.
SiC MOSFET对单次故障事件耐受时间的准确预测,极大地影响了电压源逆变器或电力电子变压器等功率变换器应用中对这些器件的器件保护电路的要求。因此,基于芯片的结构设计和物理尺寸以及4H-SiC的材料特性,提出了一种热模型。本文对垂直SiC MOSFET在各种驱动和边界条件下发生短路时的热行为进行了一般描述。热模型用一个装置的破坏性试验来代替一个正在发生的故障事件的一组单独的边界条件。通过在不同边界条件下对最先进的垂直SiC mosfet进行短路实验,验证了解析参数化热模型的有效性。所研究的热模型还可以用于标准化文献中不同的栅极氧化物降解值,以便在重复发生故障或过载条件下对单个应用的栅极氧化物进行寿命预测。这些制造商特定的报告值测量没有标准化的测试程序可以转化为最大结温,这是反复达到。因此,热模型为单个芯片和应用的栅极氧化寿命计算提供了统一的参数。
期刊介绍:
Active and Passive Electronic Components is an international journal devoted to the science and technology of all types of electronic components. The journal publishes experimental and theoretical papers on topics such as transistors, hybrid circuits, integrated circuits, MicroElectroMechanical Systems (MEMS), sensors, high frequency devices and circuits, power devices and circuits, non-volatile memory technologies such as ferroelectric and phase transition memories, and nano electronics devices and circuits.