IEEE Open Journal of the Solid-State Circuits Society Special Section on Custom Circuits and Architectures for Energy-Efficient Machine Learning

Abstract

Machine learning (ML) and artificial intelligence (AI) have been successful in many practical applications, e.g., image/speech/video recognition, object detection/tracking, natural language processing, etc. To efficiently execute such AI/ML algorithms, there have been large advances in custom hardware accelerator designs, such as digital systolic arrays of processing engines (PEs), and analog or digital circuits for in-/near-memory computing for deep neural networks (DNNs) [1] , [2] .