A 10-bit 100-MS/s 4.5-mW Pipelined ADC With a Time-Sharing Technique

IF 5.2 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2010-12-17 DOI:10.1109/TCSI.2010.2092170
Yen-Chuan Huang;Tai-Cheng Lee
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引用次数: 32

Abstract

A 10-bit pipelined ADC employs both opamp-and time-sharing techniques to reduce the power consumption and silicon area. The proposed ADC needs only one opamp to complete the 10-bit conversion. This ADC has been fabricated in a 90-nm digital CMOS technology and occupies only 0.058 mm 2 . It operates at 100 MS/s and achieves an SNDR of 55.0 dB while the power consumption is 4.5 mW from a 1.0-V supply.
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采用分时技术的10位100-MS/s 4.5-mW流水线ADC
10位流水线ADC采用运算放大器和分时技术来减少功耗和硅面积。所提出的ADC只需要一个运算放大器就可以完成10比特的转换。该ADC采用90nm数字CMOS技术制造,占地面积仅为0.058mm2。它在100 MS/s下工作,SNDR达到55.0 dB,而1.0V电源的功耗为4.5 mW。
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来源期刊
IEEE Transactions on Circuits and Systems I: Regular Papers
IEEE Transactions on Circuits and Systems I: Regular Papers 工程技术-工程:电子与电气
CiteScore
9.80
自引率
11.80%
发文量
441
审稿时长
2 months
期刊介绍: TCAS I publishes regular papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: - Circuits: Analog, Digital and Mixed Signal Circuits and Systems - Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic - Circuits and Systems, Power Electronics and Systems - Software for Analog-and-Logic Circuits and Systems - Control aspects of Circuits and Systems.
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