Nicolas Butzen;Harish Krishnamurthy;Zakir Ahmed;Sheldon Weng;Krishnan Ravichandran;Michael Zelikson;James Tschanz;Jonathan Douglas
{"title":"A Monolithic 26 A/mm2 Continuously Scalable Conversion Ratio Switched-Capacitor Converter With Phase-Merging Turbo and Communication-Less Ganging","authors":"Nicolas Butzen;Harish Krishnamurthy;Zakir Ahmed;Sheldon Weng;Krishnan Ravichandran;Michael Zelikson;James Tschanz;Jonathan Douglas","doi":"10.1109/LSSC.2023.3306369","DOIUrl":null,"url":null,"abstract":"This letter introduces the phase-merging turbo (PMT) technique, a method which significantly augments the output current capability of a continuous scalable conversion-ratio (CSCR) switched-capacitor voltage regulator (SCVR). The research also proposes a unique method for implementing communication-free ganging with these converters, enhancing their scalability across a wide range of power domain sizes. Fabricated using a 4-nm class CMOS technology, this study achieves a current density of 26 A/mm2 for monolithic capacitive voltage regulators, and a peak efficiency of 88.5%.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"6 ","pages":"273-276"},"PeriodicalIF":2.2000,"publicationDate":"2023-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10255588/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
This letter introduces the phase-merging turbo (PMT) technique, a method which significantly augments the output current capability of a continuous scalable conversion-ratio (CSCR) switched-capacitor voltage regulator (SCVR). The research also proposes a unique method for implementing communication-free ganging with these converters, enhancing their scalability across a wide range of power domain sizes. Fabricated using a 4-nm class CMOS technology, this study achieves a current density of 26 A/mm2 for monolithic capacitive voltage regulators, and a peak efficiency of 88.5%.