A 9-Bit 80-MS/s CMOS Pipelined Folding A/D Converter with an Offset Canceling Technique

IF 1.6 4区 计算机科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC ETRI Journal Pub Date : 2007-06-01 DOI:10.4218/etrij.07.0206.0180
Seung-Chul Lee, Young-Deuk Jeon, Jong-Kee Kwon
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引用次数: 6

Abstract

A 9-bit 80-MS/s CMOS pipelined folding analog-to-digital converter employing offset-canceled preamplifiers and a subranging scheme is proposed to extend the resolution of a folding architecture. A fully differential dc-decoupled structure achieves high linearity in circuit design. The measured differential nonlinearity and integral nonlinearity of the prototype are ×0.6 LSB and ×1.6 LSB, respectively.

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基于偏移抵消技术的9位80毫秒/秒CMOS流水线折叠A/D转换器
为了提高折叠结构的分辨率,提出了一种采用偏移抵消前置放大器和分位方案的9位80 ms /s CMOS流水线折叠模数转换器。全差分直流去耦结构实现了电路设计的高线性度。样机测量的微分非线性和积分非线性分别为×0.6 LSB和×1.6 LSB。
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来源期刊
ETRI Journal
ETRI Journal 工程技术-电信学
CiteScore
4.00
自引率
7.10%
发文量
98
审稿时长
6.9 months
期刊介绍: ETRI Journal is an international, peer-reviewed multidisciplinary journal published bimonthly in English. The main focus of the journal is to provide an open forum to exchange innovative ideas and technology in the fields of information, telecommunications, and electronics. Key topics of interest include high-performance computing, big data analytics, cloud computing, multimedia technology, communication networks and services, wireless communications and mobile computing, material and component technology, as well as security. With an international editorial committee and experts from around the world as reviewers, ETRI Journal publishes high-quality research papers on the latest and best developments from the global community.
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