ETRI Journal最新文献

The Internet of Things (IoT) is an intelligent network paradigm created by interconnected device networks. Although the importance of IoT systems has increased in various applications, the increasing number of connected devices has made security even more critical. This study presents the ROUT-4-2023 dataset, which represents a step toward the security of IoT networks. This dataset simulates potential attacks on RPL-based IoT networks and provides a new platform for researchers in this field. Using artificial intelligence and machine-learning techniques, a performance evaluation was performed on four different artificial neural network models (convolutional neural network, deep neural network, multilayer perceptron structure, and routing attack detection-fed forward neural network [RaD-FFNN]). The results show that the RaD-FFNN model has high accuracy, precision, and retrieval rates, indicating that it can be used as an effective tool for the security of IoT networks. This study contributes to the protection of IoT networks from potential attacks by presenting ROUT-4-2023 and RaD-FFNN models, which will lead to further research on IoT security.

Several peak-to-average power ratio (PAPR) reduction methods have been used in orthogonal frequency division multiplexing (OFDM) applications. Among the available methods, partial transmit sequence (PTS) is an efficient PAPR reduction method but can be computationally expensive while determining optimal phase factors (OPFs). Therefore, an optimization algorithm, namely, the improved salp swarm optimization algorithm (ISSA), is incorporated with the PTS to reduce the PAPR of the OFDM signals with limited computational cost. The ISSA includes a dynamic weight element and Lévy flight process to improve the global exploration ability of the optimization algorithm and to control the global and local search ability of the population with a better convergence rate. Three evaluation measures, namely, the complementary cumulative distribution function (CCDF), bit error rate (BER), and symbol error rate (SER), demonstrate the efficacy of the PTS-ISSA model, which achieves a lower PAPR of 3.47 dB and is superior to other optimization algorithms using the PTS method.

The prolonged sitting inherent in modern work and study environments poses significant health risks, necessitating effective monitoring solutions. Traditional human activity recognition systems often fall short in these contexts owing to their reliance on structured data, which may fail to capture the complexity of human movements or accommodate the often incomplete or unstructured nature of healthcare data. To address this gap, our study introduces a novel application of graph neural networks (GNNs) for detecting prolonged sitting periods using point cloud data from smartphone sensors. Unlike conventional methods, our GNN model excels at processing the unordered, three-dimensional structure of sensor data, enabling more accurate classification of sedentary activities. The effectiveness of our approach is demonstrated by its superior ability to identify sitting, standing, and walking activities—critical for assessing health risks associated with prolonged sitting. By providing real-time activity recognition, our model offers a promising tool for healthcare professionals to mitigate the adverse effects of sedentary behavior.

The massive multiple-input multiple-output (mMIMO) approach is promising for the Internet of Things (IoT) owing to its massive connectivity and high data rate. We introduce a wireless-powered cell-free mMIMO system, in which ground IoT devices transmit pilot and uplink information by harvesting downlink power from multiantenna access points. Considering the spatial correlation, we derive closed-form expressions for the average harvested power with a nonlinear energy-harvesting model per IoT device and achievable data rate according to the random matrix theory. The analytical expressions show that spatial correlation has a negative effect on the data rate owing to the increasing interference power. In contrast, the average received power improves with increasing spatial correlation. Simulation results demonstrate that the derived analytical expressions are consistent with results from the Monte Carlo method.

Network function parallelism (NFP) has gained attention for processing packets in parallel through service functions arranged in the required service function chain. While parallel processing efficiently reduces the service function chaining (SFC) completion time, it incurs a higher network overhead (e.g., network congestion) to replicate various packets for processing. To reduce the SFC completion time while maintaining a low network overhead, we propose a deep-reinforcement-learning-based NFP algorithm (DeepNFP) that provides an SFC processing policy to determine the sequential or parallel processing of every service function. In DeepNFP, deep reinforcement learning captures the network dynamics and service function conditions and iteratively finds the SFC processing policy in the network environment. Furthermore, an SFC data plane protocol based on segment routing over IPv6 configures and operates the policy in the SFC data network. Evaluation results show that DeepNFP can achieve 46% of the SFC completion time and 66% of the network overhead compared with conventional SFC and NFP, respectively.

NEST-C: A deep learning compiler framework for heterogeneous computing systems with artificial intelligence accelerators

https://doi.org/10.4218/etrij.2024-0139

ETRI Journal, Volume 46, Issue 5, October 2024, pp. 851–864.

In the article entitled “NEST-C: A deep learning compiler framework for heterogeneous computing systems with artificial intelligence accelerators,” the authors would like to correct the funding information of their article. It should be written as follows:

Funding information This study is supported by a grant from the Institute of Information & Communications Technology Planning & Evaluation (IITP), funded by the Korean government (MSIT) (No. RS-2023-00277060, Development of OpenEdge AI SoC hardware and software platform and No. 2018-0-00769, Neuromorphic Computing Software Platform for Artificial Intelligence Systems).

The authors would like to apologize for the inconvenience caused.

Sungryeul Rhyu | Junsik Kim | Gwang Hoon Park | Kyuheon Kim

Low-complexity patch projection method for efficient and lightweight point-cloud compression

https://doi.org/10.4218/etrij.2023-0242

ETRI Journal, Volume 46, Issue 4, August 2024, pp. 683–696.

In the article entitled “Low-complexity patch projection method for efficient and lightweight point-cloud compression”, the authors would like to correct the funding information of their article. It should be written as follows:

Funding information

This study was supported by the Information Technology Research Center of the Ministry of Science and ICT, Korea (grant number: IITP-2024-2021-0-02046) and the Institute of Information & Communications Technology Planning & Evaluation, Korea (grant number: RS-2023-00227431, Development of 3D space digital media standard technology).

The authors would like to apologize for the inconvenience caused.

SoCs with analog-circuit-based unsigned weight-accumulating spiking neural networks (UWA-SNNs) are a highly promising solution for achieving low-power AI-SoCs. This paper addresses the challenges that must be overcome to realize the potential of UWA-SNNs in low-power AI-SoCs: (i) the absence of UWA-SNN learning methods and the lack of an environment for developing applications based on trained SNN models and (ii) the inherent issue of testing and validating applications on the system being nearly impractical until the final chip is fabricated owing to the mixed-signal circuit implementation of UWA-SNN-based SoCs. This paper argues that, by integrating the proposed solutions, the development of an EDA tool that enables the easy and rapid development of UWA-SNN-based SoCs is feasible, and demonstrates this through the development of the SNN eXpress (SNX) tool. The developed SNX automates the generation of RTL code, FPGA prototypes, and a software development kit tailored for UWA-SNN-based application development. Comprehensive details of SNX development and the performance evaluation and verification results of two AI-SoCs developed using SNX are also presented.

Owing to the widespread advancement of transformer-based artificial neural networks, artificial intelligence (AI) processors are now required to perform matrix–vector multiplication in addition to the conventional matrix–matrix multiplication. However, current AI processor architectures are optimized for general matrix–matrix multiplications (GEMMs), which causes significant throughput degradation when processing general matrix–vector multiplications (GEMVs). In this study, we proposed a port-folding GEMV (PF-GEMV) scheme employing multiformat and low-precision techniques while reusing an outer product-based processor optimized for conventional GEMM operations. This approach achieves 93.7% utilization in GEMV operations with an 8-bit format on an 8 $�\times$ 8 processor, thus resulting in a 7.5 $�\times$ increase in throughput compared with that of the original scheme. Furthermore, when applied to the matrix operation of the GPT-2 large model, an increase in speed by 7 $�\times$ is achieved in single-batch inferences.