ETRI Journal最新文献

NEST-C: A deep learning compiler framework for heterogeneous computing systems with artificial intelligence accelerators

https://doi.org/10.4218/etrij.2024-0139

ETRI Journal, Volume 46, Issue 5, October 2024, pp. 851–864.

In the article entitled “NEST-C: A deep learning compiler framework for heterogeneous computing systems with artificial intelligence accelerators,” the authors would like to correct the funding information of their article. It should be written as follows:

Funding information This study is supported by a grant from the Institute of Information & Communications Technology Planning & Evaluation (IITP), funded by the Korean government (MSIT) (No. RS-2023-00277060, Development of OpenEdge AI SoC hardware and software platform and No. 2018-0-00769, Neuromorphic Computing Software Platform for Artificial Intelligence Systems).

The authors would like to apologize for the inconvenience caused.

Sungryeul Rhyu | Junsik Kim | Gwang Hoon Park | Kyuheon Kim

Low-complexity patch projection method for efficient and lightweight point-cloud compression

https://doi.org/10.4218/etrij.2023-0242

ETRI Journal, Volume 46, Issue 4, August 2024, pp. 683–696.

In the article entitled “Low-complexity patch projection method for efficient and lightweight point-cloud compression”, the authors would like to correct the funding information of their article. It should be written as follows:

Funding information

This study was supported by the Information Technology Research Center of the Ministry of Science and ICT, Korea (grant number: IITP-2024-2021-0-02046) and the Institute of Information & Communications Technology Planning & Evaluation, Korea (grant number: RS-2023-00227431, Development of 3D space digital media standard technology).

The authors would like to apologize for the inconvenience caused.

SoCs with analog-circuit-based unsigned weight-accumulating spiking neural networks (UWA-SNNs) are a highly promising solution for achieving low-power AI-SoCs. This paper addresses the challenges that must be overcome to realize the potential of UWA-SNNs in low-power AI-SoCs: (i) the absence of UWA-SNN learning methods and the lack of an environment for developing applications based on trained SNN models and (ii) the inherent issue of testing and validating applications on the system being nearly impractical until the final chip is fabricated owing to the mixed-signal circuit implementation of UWA-SNN-based SoCs. This paper argues that, by integrating the proposed solutions, the development of an EDA tool that enables the easy and rapid development of UWA-SNN-based SoCs is feasible, and demonstrates this through the development of the SNN eXpress (SNX) tool. The developed SNX automates the generation of RTL code, FPGA prototypes, and a software development kit tailored for UWA-SNN-based application development. Comprehensive details of SNX development and the performance evaluation and verification results of two AI-SoCs developed using SNX are also presented.

Owing to the widespread advancement of transformer-based artificial neural networks, artificial intelligence (AI) processors are now required to perform matrix–vector multiplication in addition to the conventional matrix–matrix multiplication. However, current AI processor architectures are optimized for general matrix–matrix multiplications (GEMMs), which causes significant throughput degradation when processing general matrix–vector multiplications (GEMVs). In this study, we proposed a port-folding GEMV (PF-GEMV) scheme employing multiformat and low-precision techniques while reusing an outer product-based processor optimized for conventional GEMM operations. This approach achieves 93.7% utilization in GEMV operations with an 8-bit format on an 8 $�\times$ 8 processor, thus resulting in a 7.5 $�\times$ increase in throughput compared with that of the original scheme. Furthermore, when applied to the matrix operation of the GPT-2 large model, an increase in speed by 7 $�\times$ is achieved in single-batch inferences.

Entanglement is crucial for achieving quantum advantages. However, in the context of quantum machine learning, existing optimization strategies for generating quantum classifier circuits often result in unentangled circuits, indicating an underutilization of the entanglement effect needed to learn complex patterns. In this study, we proposed a novel metaheuristic approach—genetic algorithm—for designing a quantum kernel classifier that incorporates expressive entanglement. This classifier utilizes a loopless entanglement-directed graph, where each directed edge represents the entanglement between the target and control qubits. The proposed method consistently outperforms classical and quantum baselines across various artificial and actual datasets, achieving improvements up to 32.4% and 17.5%, respectively, compared with the best model among all other baselines. Moreover, this method successfully reconstructs the hidden entanglement structures underlying artificial datasets. The results also demonstrate that the optimized circuits exhibit diverse entanglement variations across different datasets, indicating the versatility of the proposed approach.

Anomaly detection in video surveillance is crucial but challenging due to the rarity of irregular events and ambiguity of defining anomalies. We propose a method called AONet that utilizes a spatiotemporal module to extract spatiotemporal features efficiently, as well as a residual autoencoder equipped with an attention network for effective future frame prediction in video anomaly detection. AONet utilizes a novel activation function called OptAF that combines the strengths of the ReLU, leaky ReLU, and sigmoid functions. Furthermore, the proposed method employs a combination of robust loss functions to address various aspects of prediction errors and enhance training effectiveness. The performance of the proposed method is evaluated on three widely used benchmark datasets. The results indicate that the proposed method outperforms existing state-of-the-art methods and demonstrates comparable performance, achieving area under the curve values of 97.0%, 86.9%, and 73.8% on the UCSD Ped2, CUHK Avenue, and ShanghaiTech Campus datasets, respectively. Additionally, the high speed of the proposed method enables its application to real-time tasks.

Deep learning (DL) has significantly advanced artificial intelligence (AI); however, frameworks such as PyTorch, ONNX, and TensorFlow are optimized for general-purpose GPUs, leading to inefficiencies on specialized accelerators such as neural processing units (NPUs) and processing-in-memory (PIM) devices. These accelerators are designed to optimize both throughput and energy efficiency but they require more tailored optimizations. To address these limitations, we propose the NEST compiler (NEST-C), a novel DL framework that improves the deployment and performance of models across various AI accelerators. NEST-C leverages profiling-based quantization, dynamic graph partitioning, and multi-level intermediate representation (IR) integration for efficient execution on diverse hardware platforms. Our results show that NEST-C significantly enhances computational efficiency and adaptability across various AI accelerators, achieving higher throughput, lower latency, improved resource utilization, and greater model portability. These benefits contribute to more efficient DL model deployment in modern AI applications.

In this study, we report a transmitter system for free-space quantum key distribution (QKD) using the BB84 protocol, which does not require an internal alignment process, by using a wavelength-division multiplexing (WDM) filter and polarization-encoding module. With a custom-made WDM filter, the signals required for QKD can be integrated by simply connecting fibers, thus avoiding the laborious internal alignment required for free-space QKD systems using conventional bulk-optic setups. The WDM filter is designed to multiplex the single-mode signals from 785-nm quantum and 1550-nm synchronization channels for spatial-mode matching while maintaining the polarization relations. The measured insertion loss and isolation are 1.8 dB and 32.6 dB for 785 nm and 0.7 dB and 28.3 dB for 1550 nm, respectively. We also evaluate the QKD performance of the proposed system. The sifted key rate and quantum bit error rate are 1.6 Mbps and 0.62%, respectively, at an operating speed of 100 MHz, rendering our system comparable to conventional systems using bulk-optic devices for channel integration.