Parallel arrangement of MOSFETs, effective suppression of crosstalk: A new gate driver topology

Abstract

With extraordinary advantages including fast switching transient processes, high operational temperature and great thermal conduction, new semiconductor materials provide a fascinating prospect for the future development of power electronic equipment. However, several challenges must be addressed before the power electronics goes comprehensive and mature. One such challenge faced by SiC MOSFET is the crosstalk effect, which refers to the current with a significant magnitude injecting into the gate circuit, when the devices meet high drain-source voltage in the fast-switching process. Although negative gate voltage is considered to be a rule of thumb to cover the problem, we still lack solutions for parallel SiC MOSFETs.