A 900MHz direct ΔΣ receiver in 65nm CMOS

Abstract

A 900 MHz direct-conversion receiver with a ΔΣ feedback loop to RF occupies an active area of 1.2 mm² in 65 nm CMOS. The concept prototype for low-band cellular operations achieves NF of 2.3 and 6.2 dB in conventional and ΔΣ modes, respectively, and out-of-band IIP3 up to ±4 dBm when the ΔΣ loop is active. The chip consumes 80 mW from a 1.2 V supply.