Value prediction for security (VPsec): Countering fault attacks in modern microprocessors

Abstract

This work proposes VPsec, a novel hardware-only scheme that leverages value prediction in an embodiment and system design to mitigate fault attacks in general purpose microprocessors. The design of VPsec augments value prediction schemes in modern microprocessors with fault detection logic and reaction logic, to mitigate fault attacks to both the datapath and the value predictor itself. VPsec requires minimal hardware changes (negligible area impact) with respect to a baseline processor supporting value prediction, it has no software overheads {no increase in memory footprint), and, under common attack scenarios, it retains most of the performance benefits of value prediction. Our evaluation of VPsec demonstrates its efficacy in countering fault attacks and retaining performance in modern microprocessors.