A 9.4-bit, 28.8-mV range inverter based readout circuit for implantable pressure bridge piezo-resistive sensor

Abstract

This paper presents an energy efficient inverter based readout circuit for implantable pressure bridge piezo-resistive sensor which can achieve 9 bit resolution with 28.8-mV input voltage range. Only one bridge branch is utilized with interchanging supply voltage to achieve net differential input voltage range, hence reducing the power consumption by a half. A gain compensated technique is applied for inverter based switched capacitor amplifier to achieve both power efficiency and high resolution. A two-step auto calibration is applied to eliminate the offset from non-ideal effects of the switched-capacitor amplifier (SC-amp) and comparator delay. The readout system is implemented and simulated in TSMC 90 nm CMOS technology. With supply voltage of 1.2 V, simulation results show that the circuit can achieve 9.4 bit resolution while consuming only 35 μW during 320 μs conversion time. The digital output code has little sensitivity to temperature variation.