A novel low cost, high performance and reliable silicon interposer

Abstract

Silicon interposer has emerged as a substrate of choice for integrating fine pitch, high density devices. Conventional packaging of 2.5D/3D devices involves multiple level of assemblies. Normally, 2.5D/3D devices are first assembled on thinned silicon interposer with aspect ratio of 10:100 followed by second level assembly on a multi-layer organic build-up substrate. In this study we introduce direct assembly of silicon interposer on PCB, resulting in reduced cost and increased performance for 2.5D/3D applications as well as wafer-level fan-out applications. We investigate effect of under-fill on solder joint reliability during direct assembly of silicon interposer on PCB. A 10×10mm2 interposer test vehicle was designed and fabricated on 310um thick rigid silicon substrate. BGA of side of the interposer was bumped with eutectic solder balls through a reflow process. Interposer was then assembled on a 50×50mm2 FR-4 PCB through a reflow process. We present cost analysis, design flow, and direct assembly of rigid silicon interposer on PCB. Effect of under-fill on the solder joint reliability is demonstrated using CSAM images during temperature cycles at 250, 500, 750 and 1000 intervals. It is shown that all samples successfully passed the temperature cycle stress test.