A 10-b 500 MSPS current-steering CMOS D/A converter with a self-calibrated current biasing technique

Abstract

A 10-b 500 MSPS current-steering CMOS digital-to-analog converter with internal termination resistors is presented. In order to improve the device-mismatching problem of internal termination resistors, a self-calibrated current bias circuit is designed. With the self-calibrated current bias circuit, the gain error of the output voltage swing is reduced within 0.5%. Further, for the purpose of reducing glitch noise, a novel current switch based on a deglitching circuit is proposed. A 10-b CMOS DAC has been fabricated with a 3 V, 0.35 /spl mu/m technology, and it consumes 45 mW. The measured SFDR (spurious free dynamic range) is about 65 dB, when the input signal is about 8 MHz at 500 MHz clock frequency.