A Low-Noise CTIA-based pixel with CDS for SWIR Focal Plane Arrays

Yi Zhuo, Wengao Lu, Shanzhe Yu, Ye Zhou, Jiaqi Kong, Yacong Zhang, Zhongjian Chen
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引用次数: 2

Abstract

This paper proposes a readout integrated circuit (ROIC) pixel for short-wavelength infrared (SWIR) focal plane arrays, including an in-pixel capacitive trans-impedance amplifier (CTIA) with correlated double sampling (CDS) circuit. An inverter-based operational amplifier is proposed, which can obtain higher gain under the same power consumption, thereby effectively reducing thermal noise. At the same time, a compact inpixel CDS is proposed, which uses fewer switches to reduce the pixel area. This pixel circuit is designed in 180nm 1P5M CMOS process. The simulation result shows that the output swing of the circuit is 1.2V, and the linearity within the output swing reaches 99.9%. The integrating capacitor is 8fF, and the pixel output noise after CDS is 11.38e-, which is 48% lower than the traditional CTIA circuit.
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用于SWIR焦平面阵列的具有CDS的低噪声ctia像素
本文提出了一种用于短波红外焦平面阵列的读出集成电路(ROIC)像元,包括一个具有相关双采样(CDS)电路的像元内电容式跨阻抗放大器(CTIA)。提出了一种基于逆变器的运算放大器,在相同的功耗下可以获得更高的增益,从而有效地降低了热噪声。同时,提出了一种紧凑的像素级CDS,使用更少的开关来减少像素面积。该像素电路采用180nm 1P5M CMOS工艺设计。仿真结果表明,该电路的输出摆幅为1.2V,输出摆幅内的线性度达到99.9%。积分电容为8fF, CDS后的像素输出噪声为11.38e-,比传统CTIA电路降低48%。
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