A high performance data-path to accelerate DSP kernels

Q3 Arts and Humanities Giornale di Storia Costituzionale Pub Date : 2004-12-13 DOI:10.1109/ICECS.2004.1399726
M. D. Galanis, G. Theodoridis, S. Tragoudas, D. Soudris, C. Goutis
{"title":"A high performance data-path to accelerate DSP kernels","authors":"M. D. Galanis, G. Theodoridis, S. Tragoudas, D. Soudris, C. Goutis","doi":"10.1109/ICECS.2004.1399726","DOIUrl":null,"url":null,"abstract":"In this paper, a high-performance data-path for accelerating DSP kernels is proposed. The data-path is based on a flexible, universal, and regular component that allows one to optimally exploiting both inter- and intra-component chaining of operations. The component is implemented as a combinational circuit and the steering logic existing inside the component allows one to easily realizing any desirable complex hardware unit - called a template - so that the data-path's performance benefits from the chaining of operations. Due to the universal structure of the component, the synthesis of an application is accomplished by unsophisticated, yet efficient, algorithms. An average reduction of 20% in latency is achieved when a comparison with a template-based data-path is performed.","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":"27 1","pages":"495-498"},"PeriodicalIF":0.0000,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Giornale di Storia Costituzionale","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2004.1399726","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"Arts and Humanities","Score":null,"Total":0}
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Abstract

In this paper, a high-performance data-path for accelerating DSP kernels is proposed. The data-path is based on a flexible, universal, and regular component that allows one to optimally exploiting both inter- and intra-component chaining of operations. The component is implemented as a combinational circuit and the steering logic existing inside the component allows one to easily realizing any desirable complex hardware unit - called a template - so that the data-path's performance benefits from the chaining of operations. Due to the universal structure of the component, the synthesis of an application is accomplished by unsophisticated, yet efficient, algorithms. An average reduction of 20% in latency is achieved when a comparison with a template-based data-path is performed.
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一种加速DSP内核的高性能数据路径
本文提出了一种用于DSP内核加速的高性能数据路径。数据路径基于灵活、通用和规则的组件,它允许最佳地利用组件间和组件内的操作链。该组件是作为组合电路实现的,并且组件内部存在的转向逻辑允许人们轻松实现任何所需的复杂硬件单元(称为模板),以便数据路径的性能受益于操作链。由于组件的通用结构,应用程序的合成是由简单但高效的算法完成的。当与基于模板的数据路径进行比较时,延迟平均减少了20%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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Giornale di Storia Costituzionale
Giornale di Storia Costituzionale Arts and Humanities-History
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