M. D. Galanis, G. Theodoridis, S. Tragoudas, D. Soudris, C. Goutis
{"title":"A high performance data-path to accelerate DSP kernels","authors":"M. D. Galanis, G. Theodoridis, S. Tragoudas, D. Soudris, C. Goutis","doi":"10.1109/ICECS.2004.1399726","DOIUrl":null,"url":null,"abstract":"In this paper, a high-performance data-path for accelerating DSP kernels is proposed. The data-path is based on a flexible, universal, and regular component that allows one to optimally exploiting both inter- and intra-component chaining of operations. The component is implemented as a combinational circuit and the steering logic existing inside the component allows one to easily realizing any desirable complex hardware unit - called a template - so that the data-path's performance benefits from the chaining of operations. Due to the universal structure of the component, the synthesis of an application is accomplished by unsophisticated, yet efficient, algorithms. An average reduction of 20% in latency is achieved when a comparison with a template-based data-path is performed.","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":"27 1","pages":"495-498"},"PeriodicalIF":0.0000,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Giornale di Storia Costituzionale","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2004.1399726","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"Arts and Humanities","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, a high-performance data-path for accelerating DSP kernels is proposed. The data-path is based on a flexible, universal, and regular component that allows one to optimally exploiting both inter- and intra-component chaining of operations. The component is implemented as a combinational circuit and the steering logic existing inside the component allows one to easily realizing any desirable complex hardware unit - called a template - so that the data-path's performance benefits from the chaining of operations. Due to the universal structure of the component, the synthesis of an application is accomplished by unsophisticated, yet efficient, algorithms. An average reduction of 20% in latency is achieved when a comparison with a template-based data-path is performed.