{"title":"High-efficiency and cost-sharing architecture design of fast algorithm based multiple 4×4 and 8×8 forward transforms for multi-standard video encoder","authors":"Hao-Fan Hsu, Chia-Wei Chang, Chih-Peng Fan","doi":"10.1109/APCCAS.2016.7803928","DOIUrl":null,"url":null,"abstract":"In this work, fast algorithm-based multiple transforms with a hardware-sharing design are exploited for 4×4 and 8×8 forward transforms in H.264/AVC, VC-1, HEVC, and AVS standards, and for 8×8 forward transforms in MPEG-1/2/4 schemes. The 4×4 VP8 and AVS-M fast forward transforms are developed by cost-sharing hardware for multi-standard video encoding applications. By matrix factorizations, our proposed 1D hardware-sharing transform architecture is realized by only shifters and adders. Compared with the directly combined fast algorithms without hardware-sharing functionality, our proposed architecture reduces the number of shifters and adders by 24.5% and 73.4%, respectively. Compared with existing multi-standard transform designs, our proposed architecture reveals larger normalized hardware efficiency. Our proposed hardware sharing based 1-D forward transform supports the Full HD (1920×1080@60Hz) specification with the 110.8MHz working frequency.","PeriodicalId":6495,"journal":{"name":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"66 1","pages":"184-187"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2016.7803928","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In this work, fast algorithm-based multiple transforms with a hardware-sharing design are exploited for 4×4 and 8×8 forward transforms in H.264/AVC, VC-1, HEVC, and AVS standards, and for 8×8 forward transforms in MPEG-1/2/4 schemes. The 4×4 VP8 and AVS-M fast forward transforms are developed by cost-sharing hardware for multi-standard video encoding applications. By matrix factorizations, our proposed 1D hardware-sharing transform architecture is realized by only shifters and adders. Compared with the directly combined fast algorithms without hardware-sharing functionality, our proposed architecture reduces the number of shifters and adders by 24.5% and 73.4%, respectively. Compared with existing multi-standard transform designs, our proposed architecture reveals larger normalized hardware efficiency. Our proposed hardware sharing based 1-D forward transform supports the Full HD (1920×1080@60Hz) specification with the 110.8MHz working frequency.