Hardware Threading Techniques for Multi-Threaded MPSoCs

Abstract

Adapting software applications to embedded Multiprocessor System on Chips (MPSoCs) typically follows multithreaded design flows. To take advantage of the hardware customisations possible with MPSoCs, HardWare Threads (HWTs) can be used to increase application concurrency and throughput by forking between software and hardware execution. This paper describes how an application can be tailored to use HWTs. Using an application's Task Flow Graph and Kahn Process Networks to model software interactions with HWTs, two scheduling techniques for HWT interaction with software are presented and analysed. The scheduling techniques are evaluated based on system performance and resource consumption with a popular image processing algorithm, where performance increases of up to 3.6x were measured compared to standard implementations.