Design of Low Supply Voltage Phase Locked Loop Based on Dynamic Double Loops Technology

Abstract

In order to solve the power supply problem of the Internet of things chip and the low power supply voltage problem of the energy acquisition system, a low power supply voltage phase-locked loop circuit based on dynamic dual loops is proposed in this paper. The circuit uses dynamic dual loops technology and low voltage single side charge pump technology to realize the design of 0. 6V phase-locked loop circuit based on 40nm. The result shows that the RMS jitter of the designed PLL is less than 6. 6ps and the power consumption is 0. 39mw at 0. 6V supply voltage, which can meet the system clock requirements of IOT chip.