Highly Linear Four Quadrant Analog BiCMOS Multiplier for ± 1.5 V Supply Operation

J. Ramírez-Angulo
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引用次数: 32

Abstract

A highly linear four-quadrant analogue BiCMOS multiplier is presented. It operates with ±1.5V supplies and with 2V peak to peak input and output signal wings. It is based on the use of crosscoupled, voltage biased differential pairs. Experimental results of a CMOS test chip are presented that confirm the proposed structure.
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高线性四象限模拟BiCMOS乘法器±1.5 V供电操作
提出了一种高度线性的四象限模拟BiCMOS乘法器。它工作在±1.5V电源和2V峰值输入和输出信号翼。它是基于交叉耦合,电压偏置差分对的使用。最后给出了CMOS测试芯片的实验结果,验证了所提出的结构。
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