Angelo Santos, B. Tiwari, J. Martins, Ana Santa, Kamal Chapagai, P. Bahubalindruni, P. Barquinha
{"title":"A Low-Power Rail-to-Rail Row/Column Selector Operating at 2V Using a-IGZO TFTs for Flexible Displays","authors":"Angelo Santos, B. Tiwari, J. Martins, Ana Santa, Kamal Chapagai, P. Bahubalindruni, P. Barquinha","doi":"10.1109/IFETC.2018.8583933","DOIUrl":null,"url":null,"abstract":"This paper presents design and implementation of 8-bit shift register with low-voltage amorphous Indium Gallium Zinc Oxide (a-IGZO) thin-film transistors (TFTs) for row/column selection of pixel matrix in flexible displays. This circuit is capable of ensuring complete rail-to-rail operation by employing novel NAND gates that were developed based on capacitive bootstrapping load. As a first step, a positive edge triggered D-flip flop (D-FF) is designed using these logic gates, then a complete 8-bit shift register is designed and simulated using in-house low-voltage IGZO TFT models in Cadence Virtuoso. During these circuit simulations a power supply voltage of 2V and a channel length of 2 μm were used. Simulation outcome of 8-bit shift register has shown a power consumption of 72.15 μW with output voltage swing of 95% of Vdd at 20 kHz operating frequency, going well beyond the state of the art for oxide TFT technology at very low supply voltage. The proposed circuit can be used as a row/column selector in flexible displays that can operate at low supply voltage and allows small active-area.","PeriodicalId":6609,"journal":{"name":"2018 International Flexible Electronics Technology Conference (IFETC)","volume":"97 1","pages":"1-6"},"PeriodicalIF":0.0000,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Flexible Electronics Technology Conference (IFETC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IFETC.2018.8583933","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper presents design and implementation of 8-bit shift register with low-voltage amorphous Indium Gallium Zinc Oxide (a-IGZO) thin-film transistors (TFTs) for row/column selection of pixel matrix in flexible displays. This circuit is capable of ensuring complete rail-to-rail operation by employing novel NAND gates that were developed based on capacitive bootstrapping load. As a first step, a positive edge triggered D-flip flop (D-FF) is designed using these logic gates, then a complete 8-bit shift register is designed and simulated using in-house low-voltage IGZO TFT models in Cadence Virtuoso. During these circuit simulations a power supply voltage of 2V and a channel length of 2 μm were used. Simulation outcome of 8-bit shift register has shown a power consumption of 72.15 μW with output voltage swing of 95% of Vdd at 20 kHz operating frequency, going well beyond the state of the art for oxide TFT technology at very low supply voltage. The proposed circuit can be used as a row/column selector in flexible displays that can operate at low supply voltage and allows small active-area.