Taigon Song, Moongon Jung, Yang Wan, Yarui Peng, S. Lim
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引用次数: 3
Abstract
Despite many predictions that 3D IC is the solution for future low-power electronics, few studies describe how this can happen in real designs. In this paper, we investigate the practical design factors that affect the power consumption of 3D IC using a commercial-grade large-scale benchmark (OpenSPARC T2). In particular, we investigate the impact of power distribution network (PDN) in designer's perspective. Our study shows that PDN significantly affects several important design metrics in addition to the total power.
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