A. Moscoso-Mártir, F. Merget, J. Mueller, J. Hauck, S. Romero-García, B. Shen, F. Lelarge, R. Brenot, A. Garreau, E. Mentovich, A. Sandomirsky, A. Badihi, D. Rasmussen, R. Setter, J. Witzens
{"title":"Hybrid silicon photonics flip-chip laser integration with vertical self-alignment","authors":"A. Moscoso-Mártir, F. Merget, J. Mueller, J. Hauck, S. Romero-García, B. Shen, F. Lelarge, R. Brenot, A. Garreau, E. Mentovich, A. Sandomirsky, A. Badihi, D. Rasmussen, R. Setter, J. Witzens","doi":"10.1109/CLEOPR.2017.8118971","DOIUrl":null,"url":null,"abstract":"We present a flip-chip integration process in which the vertical alignment is guaranteed by a mechanical contact between pedestals defined in a recess etched into a silicon photonics chip and a laser or semiconductor optical amplifier. By selectively etching up to the active region of the III-V materials, we can make the accuracy of vertical alignment independent on the process control applied to layer thicknesses during silicon photonics or III-V chip fabrication, enabling alignment tolerances below ±10 nm in the vertical (Z-)direction.","PeriodicalId":6655,"journal":{"name":"2017 Conference on Lasers and Electro-Optics Pacific Rim (CLEO-PR)","volume":"17 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2017-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Conference on Lasers and Electro-Optics Pacific Rim (CLEO-PR)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CLEOPR.2017.8118971","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 24
Abstract
We present a flip-chip integration process in which the vertical alignment is guaranteed by a mechanical contact between pedestals defined in a recess etched into a silicon photonics chip and a laser or semiconductor optical amplifier. By selectively etching up to the active region of the III-V materials, we can make the accuracy of vertical alignment independent on the process control applied to layer thicknesses during silicon photonics or III-V chip fabrication, enabling alignment tolerances below ±10 nm in the vertical (Z-)direction.