Architecture of cluster-based FPGAs with memory

Jason P. Clifford, S. Wilton
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引用次数: 3

Abstract

Embedded memory has become an essential part of FPGAs. In this paper, we investigate how a particular FPGA architecture can be enhanced by including a single memory array in each logic cluster. It is shown that the best overall speed and density results when a cluster contains between 16 and 20 logic elements and one memory array with 512 or 1024 bits. It is also shown that 40% of the logic and memory element inputs should be available outside the cluster.
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基于集群的内存fpga结构
嵌入式存储器已成为fpga的重要组成部分。在本文中,我们研究了如何通过在每个逻辑集群中包含单个存储器阵列来增强特定的FPGA架构。结果表明,当集群包含16到20个逻辑元素和一个512或1024位的存储器阵列时,总体速度和密度最佳。它还表明,40%的逻辑和存储元素输入应该在集群之外可用。
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