A 2.5 milliwatt SOS CMOS receiver for optical interconnect

Abstract

We demonstrate a low power, high bit rate, cross coupled differential receiver in silicon on sapphire (SOS) CMOS to be used as part of an inter-chip optical interconnect. The internal amplifier of the transimpedance first stage provides high gain without requiring large, capacitive input gates. The resulting transimpedance stage extends the bandwidth of the differential receiver when small photodetectors are used. We fabricate this receiver in an SOS CMOS process to simplify the packaging of chip-to-chip interconnects with CMOS processors. The total measured power consumption of this receiver is 2.5 mW at gigabit rates, in a 0.5 /spl mu/m UTSi/spl trade/ SOS CMOS process.