Bipolar Transistor Effect in SOI MOS Structures on the Hardness to the Impact of Heavy Ion

Georgy Yashin, S. Morozov, A. Novoselov, S. Volkov, A. Glushko
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Abstract

The effect of a parasitic bipolar transistor on the electrical characteristics of SOI n-MOS transistor, developed using a technology with a minimum design length of 0.5 μm, when impact heavy charged particle (from now on - HCP), is investigated. The volt-ampere characteristics of the main and parasitic transistors were measured, and the TCAD models were calibrated using measurements. The simulation of the impact of HCP on the three-dimensional structure of SOI n-MOS transistor was carried on. The influence of the parasitic bipolar transistor on the hardness to the HCP impact was estimated by the example of a separate n-channel transistor, as well as part of an inverter.
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SOI MOS结构中双极晶体管对重离子冲击下硬度的影响
利用最小设计长度为0.5 μm的技术,研究了寄生双极晶体管在撞击重荷电粒子(从现在开始- HCP)时对SOI n-MOS晶体管电学特性的影响。测量了主晶体管和寄生晶体管的伏安特性,并利用测量值对TCAD模型进行了校准。模拟了HCP对SOI n-MOS晶体管三维结构的影响。寄生双极晶体管的硬度对HCP冲击的影响通过一个单独的n通道晶体管的例子,以及一个逆变器的一部分估计。
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