Quantum nanoelectronics: Challenges and opportunities

Abstract

After forty years of advances in integrated circuit technology, the scaling of Silicon Metal Oxide Semiconductor Field Effect Transistor (MOSFET) has entered the nanometer dimension with the introduction of 90 nm high volume manufacturing in 2004. Presently at 45 nm going to 32 nm node in 2009, the latest technological advancement has led to low power, high-density and high-speed generation of microprocessors. VLSI circuit and device simulation programs rely heavily on the laws of physics that are being discovered and re-discovered as devices are being scaled down to nanometer regime. The scaling of the Si MOSFET below 22 nm may soon meet its fundamental physical limitations. Nevertheless, novel devices and structures such as graphene, carbon nanotube field effect transistors (CNFETs) and nanowires offer a solution to overcome the performance limits. A clear understanding of a unique electronics and transport properties is vital as simulation programs always lag behind in implementing new findings and parameters that may or may not be physics-based. This paper examines quantum and nonohmic transport phenomena that are capable of predicting the performance of a nanostructure in device and circuit simulations. The ideas presented will allow researchers to identify the input physical processes to form an intelligent perspective in interpreting the output obtained.