Pub Date : 2008-12-09DOI: 10.1109/SMICND.2008.4703326
J. Millán, V. Banu, P. Brosselard, X. Jordà, A. Pérez‐Tomás, P. Godignon
A comparison between electrical characteristics of 1.2 kV Si-PiN and 4H-SiC Schottky/JBS rectifiers is presented. The 4H-SiC rectifiers were characterized in the 25degC-300degC range, while the Si-PiN was tested up to 200degC due to the Si temperature limitation. 4H-SiC rectifiers exhibited superior temperature performances and their design can be adapted to a specific application. Surge current tests were also performed on both SiC and Si devices.
{"title":"Electrical performance at high temperature and surge current of 1.2 kV power rectifiers: Comparison between Si PiN, 4H-SiC Schottky and JBS diodes","authors":"J. Millán, V. Banu, P. Brosselard, X. Jordà, A. Pérez‐Tomás, P. Godignon","doi":"10.1109/SMICND.2008.4703326","DOIUrl":"https://doi.org/10.1109/SMICND.2008.4703326","url":null,"abstract":"A comparison between electrical characteristics of 1.2 kV Si-PiN and 4H-SiC Schottky/JBS rectifiers is presented. The 4H-SiC rectifiers were characterized in the 25degC-300degC range, while the Si-PiN was tested up to 200degC due to the Si temperature limitation. 4H-SiC rectifiers exhibited superior temperature performances and their design can be adapted to a specific application. Surge current tests were also performed on both SiC and Si devices.","PeriodicalId":6406,"journal":{"name":"2008 IEEE International Conference on Semiconductor Electronics","volume":"17 1","pages":"53-59"},"PeriodicalIF":0.0,"publicationDate":"2008-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74430682","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-12-09DOI: 10.1109/SMICND.2008.4703432
A. Manolescu, A. Manolescu
A new method for improving the design of integrated thin film distributed resistive attenuators is presented. The method, based on shaping, relies on the optimization of the shape of the distributed domain in order to avoid excessive current stream lines crowding. Consequently hot spots are practically absent improving thus considerably the thermal stability of distributed attenuators as well as their overdriving endurance. A design example for proving the validity of this approach is presented in order to emphasize the advantages of the proposed method.
{"title":"Improving the design of resistive distributed signal attenuators by shaping","authors":"A. Manolescu, A. Manolescu","doi":"10.1109/SMICND.2008.4703432","DOIUrl":"https://doi.org/10.1109/SMICND.2008.4703432","url":null,"abstract":"A new method for improving the design of integrated thin film distributed resistive attenuators is presented. The method, based on shaping, relies on the optimization of the shape of the distributed domain in order to avoid excessive current stream lines crowding. Consequently hot spots are practically absent improving thus considerably the thermal stability of distributed attenuators as well as their overdriving endurance. A design example for proving the validity of this approach is presented in order to emphasize the advantages of the proposed method.","PeriodicalId":6406,"journal":{"name":"2008 IEEE International Conference on Semiconductor Electronics","volume":"1 1","pages":"381-384"},"PeriodicalIF":0.0,"publicationDate":"2008-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78722144","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-12-09DOI: 10.1109/SMICND.2008.4703366
A. Sultana, A. Reznik, K. Karim, J. Rowlands
Selenium (Se) has been successfully employed as a photoconductor to convert incident X-rays to electronic charges in direct conversion flat panel detectors for digital imaging systems. We have studied the effect of K-fluorescence reabsorption coupled with anomalous scattering on the performance of Se in protein crystallography detectors. Anomalous scattering is used as a method of phase calculation in crystallography. For occurrence of anomalous scattering, incident X-ray energy is made equal to the K-edge energy of Se. Our study indicates that significant K--fluorescence escape and reabsorption occurs at K-edge energy which degrades spatial resolution, sensitivity, and signal-to-noise ratio of the detector.
{"title":"Effect of anomalous scattering and K-fluroscence reabsorption on the performance of selenium","authors":"A. Sultana, A. Reznik, K. Karim, J. Rowlands","doi":"10.1109/SMICND.2008.4703366","DOIUrl":"https://doi.org/10.1109/SMICND.2008.4703366","url":null,"abstract":"Selenium (Se) has been successfully employed as a photoconductor to convert incident X-rays to electronic charges in direct conversion flat panel detectors for digital imaging systems. We have studied the effect of K-fluorescence reabsorption coupled with anomalous scattering on the performance of Se in protein crystallography detectors. Anomalous scattering is used as a method of phase calculation in crystallography. For occurrence of anomalous scattering, incident X-ray energy is made equal to the K-edge energy of Se. Our study indicates that significant K--fluorescence escape and reabsorption occurs at K-edge energy which degrades spatial resolution, sensitivity, and signal-to-noise ratio of the detector.","PeriodicalId":6406,"journal":{"name":"2008 IEEE International Conference on Semiconductor Electronics","volume":"10 1","pages":"193-196"},"PeriodicalIF":0.0,"publicationDate":"2008-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75027079","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-12-09DOI: 10.1109/SMICND.2008.4703430
S. Cotofana, C. Meenderinck
This paper introduces an architecture, Casta DIVA, which allows circuit and system designers to seamlessly incorporate design for variability in their designs to prevent large performance losses due to variations. The proposed architecture is generic as: (i) it takes into account all delay variation sources; (ii) applies solutions at design, test, and run time; (iii) and can be used as a template for all kind of systems, e.g., uni-processor, multi-processor. The Casta DIVA approach is introspective, that is, the system locally observes its own performance and adapts locally to the actual measured delay, by the use of local agents. To achieve global control too, the local agents are placed in a 3-level hierarchy. To reduce the extra hardware cost and to facilitate easy integration with existing design technologies we propose to utilize the JTAG boundary scan as test and communication infrastructure.
{"title":"Casta DIVA - a design for variability platform","authors":"S. Cotofana, C. Meenderinck","doi":"10.1109/SMICND.2008.4703430","DOIUrl":"https://doi.org/10.1109/SMICND.2008.4703430","url":null,"abstract":"This paper introduces an architecture, Casta DIVA, which allows circuit and system designers to seamlessly incorporate design for variability in their designs to prevent large performance losses due to variations. The proposed architecture is generic as: (i) it takes into account all delay variation sources; (ii) applies solutions at design, test, and run time; (iii) and can be used as a template for all kind of systems, e.g., uni-processor, multi-processor. The Casta DIVA approach is introspective, that is, the system locally observes its own performance and adapts locally to the actual measured delay, by the use of local agents. To achieve global control too, the local agents are placed in a 3-level hierarchy. To reduce the extra hardware cost and to facilitate easy integration with existing design technologies we propose to utilize the JTAG boundary scan as test and communication infrastructure.","PeriodicalId":6406,"journal":{"name":"2008 IEEE International Conference on Semiconductor Electronics","volume":"8 1","pages":"373-376"},"PeriodicalIF":0.0,"publicationDate":"2008-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81190893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-12-09DOI: 10.1109/SMICND.2008.4703344
T. Potlog, N. Spalatu
Thin film CdS/CdTe solar cells were fabricated by close space sublimation at the substrate temperature ranging from 300degC plusmn 5degC to 340 plusmn 5degCdegC. The best photovoltaic parameters were achieved at substrate temperature 320degC and source temperature 610degC. The open circuit voltage and current density changes significantly with the substrate temperature and depends on the substrate temperature. The open circuit voltage and current density achieves 0, 81 V and 22, 75 mA/cm2, respectively. CdS/CdTe solar cells with an efficiency of 9, 56% were obtained.
{"title":"Influence of substrate temperature on photovoltaic parameters of CdS/DdTe/Te solar cells fabricated by Close Space Sublimation","authors":"T. Potlog, N. Spalatu","doi":"10.1109/SMICND.2008.4703344","DOIUrl":"https://doi.org/10.1109/SMICND.2008.4703344","url":null,"abstract":"Thin film CdS/CdTe solar cells were fabricated by close space sublimation at the substrate temperature ranging from 300degC plusmn 5degC to 340 plusmn 5degCdegC. The best photovoltaic parameters were achieved at substrate temperature 320degC and source temperature 610degC. The open circuit voltage and current density changes significantly with the substrate temperature and depends on the substrate temperature. The open circuit voltage and current density achieves 0, 81 V and 22, 75 mA/cm2, respectively. CdS/CdTe solar cells with an efficiency of 9, 56% were obtained.","PeriodicalId":6406,"journal":{"name":"2008 IEEE International Conference on Semiconductor Electronics","volume":"30 1","pages":"117-120"},"PeriodicalIF":0.0,"publicationDate":"2008-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78299626","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-12-09DOI: 10.1109/SMICND.2008.4703336
A. Muller, G. Konstantinidis, M. Dragoman, D. Neculoiu, A. Dinescu, M. Androulidaki, M. Kayambaki, A. Stavrinidis, D. Vasilache, C. Buiculescu, I. Petrini, C. Anton, D. Dascalu, A. Kostopoulos
This paper presents the manufacturing and the characterization of GaN membrane supported MSM photodetector structures obtained by means of nanolithographic techniques. Two different runs of MSM photodetectors, with different dimensions of the MSM structures and different GaN membrane thickness, have been performed and the detectors performances are annalised. Very low dark currents and unexpected high values, in the range of 50-100 A/W for the UV detectors responsivity have been obtained.
{"title":"Ultraviolet MSM photodetector based on GaN micromachining","authors":"A. Muller, G. Konstantinidis, M. Dragoman, D. Neculoiu, A. Dinescu, M. Androulidaki, M. Kayambaki, A. Stavrinidis, D. Vasilache, C. Buiculescu, I. Petrini, C. Anton, D. Dascalu, A. Kostopoulos","doi":"10.1109/SMICND.2008.4703336","DOIUrl":"https://doi.org/10.1109/SMICND.2008.4703336","url":null,"abstract":"This paper presents the manufacturing and the characterization of GaN membrane supported MSM photodetector structures obtained by means of nanolithographic techniques. Two different runs of MSM photodetectors, with different dimensions of the MSM structures and different GaN membrane thickness, have been performed and the detectors performances are annalised. Very low dark currents and unexpected high values, in the range of 50-100 A/W for the UV detectors responsivity have been obtained.","PeriodicalId":6406,"journal":{"name":"2008 IEEE International Conference on Semiconductor Electronics","volume":"116 1","pages":"91-94"},"PeriodicalIF":0.0,"publicationDate":"2008-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87082052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-12-09DOI: 10.1109/SMICND.2008.4703434
C. Popa
A new active resistor circuit will be further presented, having the main advantages of an improved linearity and of a small area consumption. An original technique for linearizing the current-voltage characteristic of the active resistor will be proposed, based on the utilization of a MOS differential amplifier, whose transfer characteristic is linearized using an original biasing. The controllability of the active resistor circuit is excellent, being possible to modify the circuit equivalent resistance by changing the value of the biasing current. The proposed structure allows the implementing of a circuit having a negative equivalent resistance using an original cross-connection between input and output.
{"title":"Programmable CMOS active resistor using computational circuits","authors":"C. Popa","doi":"10.1109/SMICND.2008.4703434","DOIUrl":"https://doi.org/10.1109/SMICND.2008.4703434","url":null,"abstract":"A new active resistor circuit will be further presented, having the main advantages of an improved linearity and of a small area consumption. An original technique for linearizing the current-voltage characteristic of the active resistor will be proposed, based on the utilization of a MOS differential amplifier, whose transfer characteristic is linearized using an original biasing. The controllability of the active resistor circuit is excellent, being possible to modify the circuit equivalent resistance by changing the value of the biasing current. The proposed structure allows the implementing of a circuit having a negative equivalent resistance using an original cross-connection between input and output.","PeriodicalId":6406,"journal":{"name":"2008 IEEE International Conference on Semiconductor Electronics","volume":"17 1","pages":"389-392"},"PeriodicalIF":0.0,"publicationDate":"2008-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82681493","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-12-09DOI: 10.1109/SMICND.2008.4703333
D. Dragoman, A. Dinescu, R. Muller, C. Kusko, A. Herghelegiu, M. Kusko
This paper describes the fabrication of two- dimensional photonic crystals (PCs) obtained by direct patterning of positive PMMA electronoresist, using the electron-beam lithography technique (EBL). We design, fabricate and simulate a passive optical structure: a channel PC waveguide, to be used in integrated optic applications. The fabrication of the device is a challenge because we integrated the PC waveguide configuration with a taper optical waveguide on the same substrate. The finite difference time domain (FDTD) simulations were used to predict the optical behavior, and in particular the band gap, of the investigated structure.
{"title":"PMMA photonic crystals for waveguiding applications","authors":"D. Dragoman, A. Dinescu, R. Muller, C. Kusko, A. Herghelegiu, M. Kusko","doi":"10.1109/SMICND.2008.4703333","DOIUrl":"https://doi.org/10.1109/SMICND.2008.4703333","url":null,"abstract":"This paper describes the fabrication of two- dimensional photonic crystals (PCs) obtained by direct patterning of positive PMMA electronoresist, using the electron-beam lithography technique (EBL). We design, fabricate and simulate a passive optical structure: a channel PC waveguide, to be used in integrated optic applications. The fabrication of the device is a challenge because we integrated the PC waveguide configuration with a taper optical waveguide on the same substrate. The finite difference time domain (FDTD) simulations were used to predict the optical behavior, and in particular the band gap, of the investigated structure.","PeriodicalId":6406,"journal":{"name":"2008 IEEE International Conference on Semiconductor Electronics","volume":"32 1","pages":"85-88"},"PeriodicalIF":0.0,"publicationDate":"2008-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82804421","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-12-09DOI: 10.1109/SMICND.2008.4703409
L. Michalas, G. Papaioannou, A. Voutsas
The effects of alpha-particles irradiation on the electrical properties of poly-Si TFTs are investigated, through the temperature analysis of the transfer characteristics. As indicated by the thermally activated parameters, generation of states deep in the band gap usually attributed to dangling or floating bonds, is responsible for the device degradation. Therefore the OFF state leakage current and the subthreshold swing were found to increase, while the carrierspsila mobility to decrease with the radiation fluence. Furthermore a negative threshold voltage shift is observed attributed to positively charged oxygen vacancies in SiO2 introduced by irradiation.
{"title":"Effects of α-particles irradiation on polycrystalline silicon thin film transistors","authors":"L. Michalas, G. Papaioannou, A. Voutsas","doi":"10.1109/SMICND.2008.4703409","DOIUrl":"https://doi.org/10.1109/SMICND.2008.4703409","url":null,"abstract":"The effects of alpha-particles irradiation on the electrical properties of poly-Si TFTs are investigated, through the temperature analysis of the transfer characteristics. As indicated by the thermally activated parameters, generation of states deep in the band gap usually attributed to dangling or floating bonds, is responsible for the device degradation. Therefore the OFF state leakage current and the subthreshold swing were found to increase, while the carrierspsila mobility to decrease with the radiation fluence. Furthermore a negative threshold voltage shift is observed attributed to positively charged oxygen vacancies in SiO2 introduced by irradiation.","PeriodicalId":6406,"journal":{"name":"2008 IEEE International Conference on Semiconductor Electronics","volume":"90 1","pages":"301-304"},"PeriodicalIF":0.0,"publicationDate":"2008-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77907624","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-12-09DOI: 10.1109/SMICND.2008.4703376
G. de Angelis, A. Lucibello, R. Marcelli, S. Catoni, A. Lanciano, R. Buttiglione, M. Dispenza, F. Giacomozzi, B. Margesin, A. Maglione, M. Erspan, C. Combi
Packaged MEMS devices for RF applications have been modelled, realized and tested. In particular, RF MEMS single ohmic series switches (SPST) have been obtained on silicon high resistivity substrates and they have been integrated in alumina packages to get single-pole-double-thru (SPDT) and true-time-delay-line (TTDL) configurations. As a result, TTDLs for wide band operation, designed for the (6-18) GHz band, have been obtained, with predicted insertion losses less than 2 dB up to 14 GHz for the short path and 3 dB for the long path, and delay times in the order of 0.3-0.4 ns for the short path and 0.5-0.6 ns for the long path. The maximum differential delay time is in the order of 0.2 ns.
{"title":"Packaged single pole double thru (SPDT) and true time delay lines (TTDL) based on RF MEMS switches","authors":"G. de Angelis, A. Lucibello, R. Marcelli, S. Catoni, A. Lanciano, R. Buttiglione, M. Dispenza, F. Giacomozzi, B. Margesin, A. Maglione, M. Erspan, C. Combi","doi":"10.1109/SMICND.2008.4703376","DOIUrl":"https://doi.org/10.1109/SMICND.2008.4703376","url":null,"abstract":"Packaged MEMS devices for RF applications have been modelled, realized and tested. In particular, RF MEMS single ohmic series switches (SPST) have been obtained on silicon high resistivity substrates and they have been integrated in alumina packages to get single-pole-double-thru (SPDT) and true-time-delay-line (TTDL) configurations. As a result, TTDLs for wide band operation, designed for the (6-18) GHz band, have been obtained, with predicted insertion losses less than 2 dB up to 14 GHz for the short path and 3 dB for the long path, and delay times in the order of 0.3-0.4 ns for the short path and 0.5-0.6 ns for the long path. The maximum differential delay time is in the order of 0.2 ns.","PeriodicalId":6406,"journal":{"name":"2008 IEEE International Conference on Semiconductor Electronics","volume":"35 1","pages":"227-230"},"PeriodicalIF":0.0,"publicationDate":"2008-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72958823","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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