A flash-based non-uniform sampling ADC enabling digital anti-aliasing filter in 65nm CMOS

Abstract

This paper introduces a different class of ADC architecture that non-uniformly samples the analog input but generates uniform digital output. The proposed non-uniform sampling ADC utilizes 4-bit voltage quantizer and time quantizer with 10 ps accuracy. Combined with the proposed digital anti-aliasing filter, it improves SNR by nearly 30 dB in comparison with a conventional 4-bit uniform sampling ADC. Furthermore, the unwanted blocker signal can be attenuated within this non-uniform sampling ADC architecture without an analog anti-aliasing filter. As a proof of concept, the ADC prototype in 65nm CMOS measures EVM of -27 dB for a 16-QAM input signal under 50-dB higher blocker.