A. Boebel, H. Ceslik, Helmut Colbow, M. Dam, S. Díez, I. Gregor, P. Göttlicher, J. Keaveney, Joash Nicholas Naidoo, M. N. van der Merwe, J. Oechsle, S. Schmitt, M. Stanitzki, R. Ström, C. Wanotayaroj, J. Wyngaard
{"title":"Recent Results from the First lpGBT-based Prototype of the End-of-Substructure Card for the ATLAS ITk Strip Detector","authors":"A. Boebel, H. Ceslik, Helmut Colbow, M. Dam, S. Díez, I. Gregor, P. Göttlicher, J. Keaveney, Joash Nicholas Naidoo, M. N. van der Merwe, J. Oechsle, S. Schmitt, M. Stanitzki, R. Ström, C. Wanotayaroj, J. Wyngaard","doi":"10.1109/NSS/MIC42677.2020.9507943","DOIUrl":null,"url":null,"abstract":"The main building blocks of the ATLAS Inner Tracker (ITk) Strip Detector, to be installed for the High-Luminosity Upgrade of the Large Hadron Collider (HL-LHC), are modules that host sensors and front-end ASICs. Carbon-fibre substructures provide mechanical support to up to 14 modules per side. An End-of-Substructure (EoS) card on each substructure side connects up to 28 differential data lines at 640 Mbit/s from the module to low-powered GigaBit Transceivers (lpGBT) ASICs for data serialisation and uses 10 GBit/s optical links to transmit signals to the off-detector systems via the Versatile Link PLUS (VL+) transceiver module, VTRx+. Prototype EoS cards have been designed and extensively tested using lpGBT and VTRx+ prototypes. The status of the electronics design and recent results of tests of electrical and data processing performance based on these prototypes are presented.","PeriodicalId":6760,"journal":{"name":"2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)","volume":"33 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NSS/MIC42677.2020.9507943","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The main building blocks of the ATLAS Inner Tracker (ITk) Strip Detector, to be installed for the High-Luminosity Upgrade of the Large Hadron Collider (HL-LHC), are modules that host sensors and front-end ASICs. Carbon-fibre substructures provide mechanical support to up to 14 modules per side. An End-of-Substructure (EoS) card on each substructure side connects up to 28 differential data lines at 640 Mbit/s from the module to low-powered GigaBit Transceivers (lpGBT) ASICs for data serialisation and uses 10 GBit/s optical links to transmit signals to the off-detector systems via the Versatile Link PLUS (VL+) transceiver module, VTRx+. Prototype EoS cards have been designed and extensively tested using lpGBT and VTRx+ prototypes. The status of the electronics design and recent results of tests of electrical and data processing performance based on these prototypes are presented.