J. Guinea, L. Tomasini, Santo Maggio, Massimiliano Rutar
{"title":"A single chip 155 Mbps/140 Mbps SDH/PDH transceiver","authors":"J. Guinea, L. Tomasini, Santo Maggio, Massimiliano Rutar","doi":"10.1109/CICC.2000.852675","DOIUrl":null,"url":null,"abstract":"The 155 Mbps (STM-l electrical) transceiver complies with the relevant ITU-T recommendations. The transmit channel features CMI transmission (transformerless) with specified jitter-generation. On the receiver side, jitter-tolerance and bit error rate performance is attained. A cable equalizer supports 13.7 dB loss (Nyquist-frequency) and has an eye-closure less than 600 psec. The device uses one master-clock (155 MHz) and a DLL for both TX and RX synchronization. Targeted crosstalk isolation performance is achieved with a 0.35 /spl mu/m BiCMOS technology. The TQFP48 IC powered from 3.3 V consumes 390 mW.","PeriodicalId":20702,"journal":{"name":"Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044)","volume":"137 1","pages":"315-318"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2000.852675","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The 155 Mbps (STM-l electrical) transceiver complies with the relevant ITU-T recommendations. The transmit channel features CMI transmission (transformerless) with specified jitter-generation. On the receiver side, jitter-tolerance and bit error rate performance is attained. A cable equalizer supports 13.7 dB loss (Nyquist-frequency) and has an eye-closure less than 600 psec. The device uses one master-clock (155 MHz) and a DLL for both TX and RX synchronization. Targeted crosstalk isolation performance is achieved with a 0.35 /spl mu/m BiCMOS technology. The TQFP48 IC powered from 3.3 V consumes 390 mW.
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