{"title":"A simple parallel architecture for discrete wavelet transform","authors":"S. Chang, M. Lee, J. Cha","doi":"10.1109/ISCAS.1997.621571","DOIUrl":null,"url":null,"abstract":"In this paper, we present a simple parallel architecture for Discrete Wavelet Transform (DWT). Efficient computation of the pyramid algorithm for the computing of the discrete wavelet transform is possible due to the similarity between computation results of each octave. By using similarity, we separated the filter into 2 parts, an even filter and an odd filter. 1 octave and other octave computation are performed in the even and odd filters at the same time. The proposed architecture has following features. (1) Critical path is 1 multiplier and 1 adder; (2) the number of required registers is 1+J*([L/sub h//2]-1)+1+J*([L/sub 1//2]-1)+J, where J is the number of octaves, L/sub h/ is length of the highpass filter and L/sub 1/ is length of the lowpass filter.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"68 1","pages":"2100-2103 vol.3"},"PeriodicalIF":0.0000,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"电路与系统学报","FirstCategoryId":"1093","ListUrlMain":"https://doi.org/10.1109/ISCAS.1997.621571","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
In this paper, we present a simple parallel architecture for Discrete Wavelet Transform (DWT). Efficient computation of the pyramid algorithm for the computing of the discrete wavelet transform is possible due to the similarity between computation results of each octave. By using similarity, we separated the filter into 2 parts, an even filter and an odd filter. 1 octave and other octave computation are performed in the even and odd filters at the same time. The proposed architecture has following features. (1) Critical path is 1 multiplier and 1 adder; (2) the number of required registers is 1+J*([L/sub h//2]-1)+1+J*([L/sub 1//2]-1)+J, where J is the number of octaves, L/sub h/ is length of the highpass filter and L/sub 1/ is length of the lowpass filter.