LEGO-based VLSI design and implementation of polar codes encoder architecture with radix-2 processing engines

Abstract

Polar Codes become a new channel coding, which will be common to apply for next-generation wireless MIMO communication systems. In this work, we propose LEGO-based VLSI hardware design and implementation of the Polar encoder using radix-2 processing engines, which features low area cost, low power dissipation, high speed, and high throughput via serial computation. Under TSMC 90nm CMOS technology, the 16384-point LEGO-based radix-2 Polar encoder chip (LB-R2-PE) is designed and synthesized with total area of 0.244mm2 and power dissipation of 366.6mW, operating at maximum frequency of 2.0GHz. In the APR chip implementation point-of-view, the 16384-point LB-R2-PE chip only occupies 0.305mm2 and consumes 357.8mW with maximum operating frequency of 1.61GHz, delivering total throughput of 1.61Gbps.