{"title":"Identification of hotspots on FPGA using Time to Digital Converter and distributed tiny sensors","authors":"Mahantesh P. Mattada, Sachin Magadum, H. Guhilot","doi":"10.1109/ISPTS.2015.7220119","DOIUrl":null,"url":null,"abstract":"Fully digital time-domain temperature sensors are designed and placed at five different positions within FPGA. Five tiny pulse-generators are used as five temperature sensors. Using manual floor-planning four sensors are placed at four different corners and one at centre. Single 9-bit Time to Digital Converter is utilized for digital output coding. Vernier Time to Digital Converter with 6 picoseconds resolution is presented here. The overall design utilizes 184 logical elements of FPGA i.e. less than 1.5% of the total resources. Implemented temperature sensors give nearly 0.5°C resolution and maximum of ±1.5 LSB nonlinearity is observed over the range.","PeriodicalId":6520,"journal":{"name":"2015 2nd International Symposium on Physics and Technology of Sensors (ISPTS)","volume":"305 1","pages":"235-239"},"PeriodicalIF":0.0000,"publicationDate":"2015-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 2nd International Symposium on Physics and Technology of Sensors (ISPTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPTS.2015.7220119","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
Fully digital time-domain temperature sensors are designed and placed at five different positions within FPGA. Five tiny pulse-generators are used as five temperature sensors. Using manual floor-planning four sensors are placed at four different corners and one at centre. Single 9-bit Time to Digital Converter is utilized for digital output coding. Vernier Time to Digital Converter with 6 picoseconds resolution is presented here. The overall design utilizes 184 logical elements of FPGA i.e. less than 1.5% of the total resources. Implemented temperature sensors give nearly 0.5°C resolution and maximum of ±1.5 LSB nonlinearity is observed over the range.
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