T. Fukushima, Y. Susumago, H. Kino, Tetsu Tanaka, A. Alam, A. Hanna, S. Iyer
{"title":"Process Integration for FlexTrateTM","authors":"T. Fukushima, Y. Susumago, H. Kino, Tetsu Tanaka, A. Alam, A. Hanna, S. Iyer","doi":"10.1109/IFETC.2018.8584029","DOIUrl":null,"url":null,"abstract":"We fabricate FlexTrateTM that is highly integrated bendable and/or rollable electronic systems in which various Si and/or III–V chips are embedded in elastomers and interconnected at the wafer level. This paper describes the process integration of the FlexTrateTM using massively parallel capillary self-assembly and a new single stress buffer layer technologies to form fine-pitch interconnection between the embedded neighboring chips and characterize the electrical/mechanical properties.","PeriodicalId":6609,"journal":{"name":"2018 International Flexible Electronics Technology Conference (IFETC)","volume":"37 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Flexible Electronics Technology Conference (IFETC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IFETC.2018.8584029","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
We fabricate FlexTrateTM that is highly integrated bendable and/or rollable electronic systems in which various Si and/or III–V chips are embedded in elastomers and interconnected at the wafer level. This paper describes the process integration of the FlexTrateTM using massively parallel capillary self-assembly and a new single stress buffer layer technologies to form fine-pitch interconnection between the embedded neighboring chips and characterize the electrical/mechanical properties.
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