Multibit /spl Delta//spl Sigma/ CMOS DAC employing enhanced noise-shaped DEM architecture

Abstract

A multibit delta-sigma (/spl Delta//spl Sigma/) DAC employing enhanced noise-shaped dynamic element matching (DEM) architecture is presented. The architecture for implementing a noise-shaped DEM algorithm for use in multibit delta-sigma (/spl Delta//spl Sigma/) converters is analyzed. The suggested architecture shows the performance improvement as compared to previous solutions. System operation is discussed and hardware realization of the proposed architecture is described. A five-level /spl Delta//spl Sigma/ digital-to-analog (D/A) converter incorporating the proposed DEM architecture has been fabricated in a 0.12-/spl mu/m single-poly CMOS process. Finally, measured results are presented.