An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing

W. Cheng, K. Pun, C. Chan, O. Choy
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Abstract

Lowpass complex sigma-delta (/spl Sigma//spl Delta/) modulators that have a built-in mixer can be used to digitize narrowband intermediate frequency (IF) signals in radios and cellular systems. A well-known problem of the complex modulators is the mismatches between the in-phase (I) and quadrature phase (Q) channels. In this paper, a technique of sharing the critical sampling and feedback capacitors between the I and Q channels of the modulator is proposed. As demonstrated by circuit simulations, the mismatch effect can be greatly suppressed and thus the image rejection performance can be improved. A 3/sup rd/ order complex modulator is designed with a 0.35/spl mu/m CMOS technology for a 10.7MHz IF input.
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一个中频采样SC复合低通σ δ调制器,具有高图像抑制电容共享
具有内置混频器的低通复Sigma - Delta (/spl Sigma//spl Delta/)调制器可用于无线电和蜂窝系统中的窄带中频(IF)信号数字化。复杂调制器的一个众所周知的问题是同相信道(I)和正交信道(Q)之间的不匹配。本文提出了一种在调制器的I通道和Q通道之间共享临界采样和反馈电容的技术。电路仿真结果表明,该方法可以有效地抑制失配效应,从而提高图像抑制性能。针对10.7MHz中频输入,采用0.35/spl mu/m CMOS技术设计了一个3/sup /阶复杂调制器。
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