Active substrates for optoelectronic interconnect

Abstract

We present the design of an intelligent optoelectronic chip carrier (IOCC). This is an active package that is the basis for short haul, PCB by Chiarulli and Levitan (2003) and MCM by Bakos et al. (2003) and Selavo et al. (2003) level, optical interconnect. Our goal is a new solution to one of the most difficult problems associated with the packaging of chip-level optical interconnections; the dense and spatially interleaved integration of optical signaling with electric signals, power and ground. Our approach is based on an "active substrate" using Peregrine UTSi silicon on sapphire technology and the adaptation of laser drilling techniques to create vias through the sapphire. The result is an optoelectronic package that supports full CMOS performance, is mechanically and electrically compatible with current ball grid array (BGA) technology for electronic interconnect, and provides windows for active side optical I/O and substrate-side thermal extraction paths.