P. Buffet, Joseph Natonio, R. Proctor, Yu H. Sun, Gulsun Yasar
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引用次数: 22
Abstract
Electrical rule checking is fundamental to achieve a good I/O cell placement. This paper presents the analysis techniques used to design a robust power-grid structure, the method used to make I/O cell placement guidelines, details of the I/O cell placement process and electrical checking algorithms.
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