{"title":"Design of Transient Enhanced LDO Circuit for GaN HEMT Gate Driver","authors":"Li Wang, De-Zhong Zhou, Ningye He, Yuan Xu, Xiaoxiong He, Zhenhai Chen","doi":"10.1109/ICICM54364.2021.9660317","DOIUrl":null,"url":null,"abstract":"A dynamic bias transient enhanced LDO (Low Dropout regulator) circuit for GaN gate driver is presented in this paper. With high-speed comparator, the bias current of LDO error amplifier can be switched dynamically when large load occurs. The reference voltage of high-speed comparator determines the response time of dynamic bias control circuit. The LDO has been designed in 0.18 μm BCD (Bipolar-CMOS-DMOS) process, simulation results show that the proposed LDO undershoot voltage is 16.6% of output voltage and the recovery time is less than 0.5us when load current is changed from 0mA to 20mA by frequency is 1MHZ.","PeriodicalId":6693,"journal":{"name":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"1 1","pages":"40-44"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM54364.2021.9660317","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A dynamic bias transient enhanced LDO (Low Dropout regulator) circuit for GaN gate driver is presented in this paper. With high-speed comparator, the bias current of LDO error amplifier can be switched dynamically when large load occurs. The reference voltage of high-speed comparator determines the response time of dynamic bias control circuit. The LDO has been designed in 0.18 μm BCD (Bipolar-CMOS-DMOS) process, simulation results show that the proposed LDO undershoot voltage is 16.6% of output voltage and the recovery time is less than 0.5us when load current is changed from 0mA to 20mA by frequency is 1MHZ.