Design of Transient Enhanced LDO Circuit for GaN HEMT Gate Driver

Li Wang, De-Zhong Zhou, Ningye He, Yuan Xu, Xiaoxiong He, Zhenhai Chen
{"title":"Design of Transient Enhanced LDO Circuit for GaN HEMT Gate Driver","authors":"Li Wang, De-Zhong Zhou, Ningye He, Yuan Xu, Xiaoxiong He, Zhenhai Chen","doi":"10.1109/ICICM54364.2021.9660317","DOIUrl":null,"url":null,"abstract":"A dynamic bias transient enhanced LDO (Low Dropout regulator) circuit for GaN gate driver is presented in this paper. With high-speed comparator, the bias current of LDO error amplifier can be switched dynamically when large load occurs. The reference voltage of high-speed comparator determines the response time of dynamic bias control circuit. The LDO has been designed in 0.18 μm BCD (Bipolar-CMOS-DMOS) process, simulation results show that the proposed LDO undershoot voltage is 16.6% of output voltage and the recovery time is less than 0.5us when load current is changed from 0mA to 20mA by frequency is 1MHZ.","PeriodicalId":6693,"journal":{"name":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"1 1","pages":"40-44"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM54364.2021.9660317","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

A dynamic bias transient enhanced LDO (Low Dropout regulator) circuit for GaN gate driver is presented in this paper. With high-speed comparator, the bias current of LDO error amplifier can be switched dynamically when large load occurs. The reference voltage of high-speed comparator determines the response time of dynamic bias control circuit. The LDO has been designed in 0.18 μm BCD (Bipolar-CMOS-DMOS) process, simulation results show that the proposed LDO undershoot voltage is 16.6% of output voltage and the recovery time is less than 0.5us when load current is changed from 0mA to 20mA by frequency is 1MHZ.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
GaN HEMT栅极驱动器瞬态增强LDO电路设计
提出了一种用于GaN栅极驱动器的动态偏置瞬态增强型LDO电路。利用高速比较器,可以在大负载时动态切换LDO误差放大器的偏置电流。高速比较器的参考电压决定了动态偏置控制电路的响应时间。采用0.18 μm BCD (bibipolar - cmos - dmos)工艺设计LDO,仿真结果表明,当负载电流由0mA变为20mA,频率为1MHZ时,LDO欠激电压为输出电压的16.6%,恢复时间小于0.5us。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
[ICICM 2021 Front cover] Power Amplifier of Two-stage MMIC with Filter and Antenna Design for Transmitter Applications Design of a 220GHz Frequency Quadrupler in 0.13 µ m SiGe Technology RF Front-End CMOS Receiver with Antenna for Millimeter-Wave Applications A Reinforcement Learning-based Online-training AI Controller for DC-DC Switching Converters
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1