{"title":"A Novel High Precision Low Power Current-Mode Multiplier","authors":"Feng Yang","doi":"10.1109/ICICM54364.2021.9660279","DOIUrl":null,"url":null,"abstract":"In this paper a novel current-mode analog multiplier based on translinear principle is presented. The transistors in the translinear loop all operate in the strong inversion region. The circuit consists of a current-mode square root circuit and a current-mode square/divider circuit. The circuit has favorable precision, wide dynamic range and is insensitive to variations in temperature and processing. The simulated results show that the multiplier has a bandwidth of 1 MHz. The total harmonic distortion of the multiplier is less than 1%. It is suitable for a wide range of analog signal processing application. Due to the low power, scalability and modularity, it can be also easily integrated in massive parallel systems.","PeriodicalId":6693,"journal":{"name":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"24 1","pages":"69-72"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM54364.2021.9660279","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper a novel current-mode analog multiplier based on translinear principle is presented. The transistors in the translinear loop all operate in the strong inversion region. The circuit consists of a current-mode square root circuit and a current-mode square/divider circuit. The circuit has favorable precision, wide dynamic range and is insensitive to variations in temperature and processing. The simulated results show that the multiplier has a bandwidth of 1 MHz. The total harmonic distortion of the multiplier is less than 1%. It is suitable for a wide range of analog signal processing application. Due to the low power, scalability and modularity, it can be also easily integrated in massive parallel systems.